IntelUser2000
Elite Member
- Oct 14, 2003
- 8,686
- 3,785
- 136
-Sapphire Rapids doesn't have Gracemont cores. It's physically not there in the die shot. Where did you get that idea?
-The 34C MCC is weird.
-When Jim Keller said 800+ OoOE resources, he didn't mean a specific Intel CPU, but that it could be expanded and the performance be taken advantage of. He was basically saying there's room to grow.
-The MCC/LCC Intel dies are relatively inefficient in terms of core/die area because the I/O take a lot of space.
Icelake-SP according to semianalysis:
XCC 42 cores: 640mm2
HCC 28 cores: 505mm2
LCC 16 cores: 370mm2
Does it mean that LCC has cores that are 2.5x larger than the ones used in XCC? No. Rather than having the I/O section separate as with AMD, Intel has it split between dies.
Yes the cores are large but not 80% large.
-The 34C MCC is weird.
-When Jim Keller said 800+ OoOE resources, he didn't mean a specific Intel CPU, but that it could be expanded and the performance be taken advantage of. He was basically saying there's room to grow.
-The MCC/LCC Intel dies are relatively inefficient in terms of core/die area because the I/O take a lot of space.
Icelake-SP according to semianalysis:
XCC 42 cores: 640mm2
HCC 28 cores: 505mm2
LCC 16 cores: 370mm2
Does it mean that LCC has cores that are 2.5x larger than the ones used in XCC? No. Rather than having the I/O section separate as with AMD, Intel has it split between dies.
Yes the cores are large but not 80% large.