exquisitechar
Senior member
- Apr 18, 2017
- 657
- 871
- 136
It's Golden, yes.So is SPR using Golden or Willow Cove?
Leveraging native AMX and a massive IPC increase (compared to Sunny Cove) would point to Golden.
It's Golden, yes.So is SPR using Golden or Willow Cove?
Leveraging native AMX and a massive IPC increase (compared to Sunny Cove) would point to Golden.
Just like Comet Lake is not only 10C sales, same buyers who are buying 10400F or 10600K or 10850K or 3600X on deals will have a additional option in Rocket Lake-S.
You can go bigger and still improve perf/W. You just need to ensure that your IPC increase outstrips any increase to power at the same clock.Intel needs massive IPC uplift - and massive performance/watt uplift at the same time. They need completely new uarch to be competitive, if they just keep making those Cove-cores bigger their end product will be useless for about every use case.
+10% IPC and -2 cores doesn't look like it's going to make the product that much better than just Comet Lake-S, especially if Intel is forced to massively discount everything.
Well, if Intel focus on the middle area with good prices and that stops the increase in prices ill say we all win. Otherwise CPUs are going to face the same fate as GPUs.
I'm expecting Intel to stick with CML-S pricing for respective RKL-S SKUs. With the exceptionally useless i9 on top this time around.Well, if Intel focus on the middle area with good prices and that stops the increase in prices ill say we all win. Otherwise CPUs are going to face the same fate as GPUs.
I'm not inclinded to disagree with you there. Rocket Lake-S hitting with a max price point in the $300-$350 range (for the 11900k)
So is SPR using Golden or Willow Cove?
Leveraging native AMX and a massive IPC increase (compared to Sunny Cove) would point to Golden.
It is logical that WillowCove will not be in the next generation Xeon for a very simple reason. How is x86 SunnyCove different from x86 WillowCove? The difference lies only in the cache subsystem which is Inclusive in SunnyCove and non-Inclusive in WillowCove. We already have an equivalent of WillowCove in Xeon in the form of Icelake-SP which, like WillowCove, has a non-Inclusive cache subsystem, but with different capacity.
WillowCove is like Skylake-X. Skylake and SunnyCove are cores with the Inclusive subsystem, and Skylake-X, SunnyCove-SP, and WillowCove are the transition from the same x86 core to the non-exclusive cache subsystem. I don't think the move from SunnyCove-SP to WillowCove will bring about any real performance boost on Xeon, especially since the x86 core itself is the same. Another thing is GoldenCove, which will bring a sizable increase in IPC with the same type of cache subsystem as WillowCove.Nope. Skylake-SP already had that L2 non-inclusive in L3 structure, but L1 contents were inclusive in L2. Icelake-SP will keep that structure as WillowCove is simply a different core, with different coherency controller that is aware of new cache hierarchy. So that is not the reason for WillowCove being MIA in servers. I think real reasons has to do with timing, 10nm, Icelake-SP already being in pipeline for half of decade.
WillowCove is like Skylake-X. Skylake and SunnyCove are cores with the Inclusive subsystem
Willow Cove is not like Skylake-X, completely different thing from "uncore" side. Where on Skylake-X it was enough to keep shadow tags of what is in L2, Willow Cove needs to go deeper and also handle cache lines that are L1, since that is no longer inclusive of L2.
By saying "the same" I meant that for Skylake-S and Skylake-X / SP the base is the x86 Skylake core, as well as for Iceland, Rocketlake, Iceland-SP and Tigerlake, the base is x86 SunnyCove, which Intel itself does not hide. Switching from Iceland-SP to Tigerlake-SP would not do much in certain loads and it would not be enough for Zen3. Anyway, Intel itself claims that with WillowCove they had two options:Nope. Skylake-SP already had that L2 non-inclusive in L3 structure, but L1 contents were inclusive in L2. Icelake-SP will keep that structure as WillowCove is simply a different core, with different coherency controller that is aware of new cache hierarchy. So that is not the reason for WillowCove being MIA in servers. I think real reasons has to do with timing, 10nm, Icelake-SP already being in pipeline for half of decade.
They chose the second option. Personally, I think WillowCove does little to SunnyCove / CypressCove only changes the overall load balance where it performs better but at the expense of others (worse) or comparatively with a much larger x86 + L2 + L3 core surface. Nevertheless, changes to the structure of the cache system in WillowCove are the foundation for future generations (GoldenCove) and indicate the direction that Intel has already taken.
I think it is quite possible that the WillowCove cache subsystem is a data leak remedy. WillowCove and GoldenCove have a cache subsystem that is very similar to all Zen generations (1, 2, and 3), and possibly this makes much less vulnerable to attack.As their cache-structure now wastes much more space for same performance reason why they changed it can be speculated - did they change their cache-system to prevent side-channel leaks from their previously used cache scheme?
Some time ago there was an entry in the Sisoftware benchmark of the Alderlake sample which shows that the GoldenCove cache subsystem is non-inclusive as well as WillowCove.While I don't doubt it, is there anything to suggest that Golden Cove is using non-inclusive L2 and L3?
Why are we so focused on "Halo" products or their pricing? 11900K could cost 666 eur - i don't care, what is important is 11400 priced at say 180 eur and decent perf and features. What about 10600K with price that is 100 eur lower than 5600X ? AMD reacting and dropping prices or releasing additional SKUs - even better for us customers!
Willow Cove is not like Skylake-X, completely different thing from "uncore" side. Where on Skylake-X it was enough to keep shadow tags of what is in L2, Willow Cove needs to go deeper and also handle cache lines that are L1, since that is no longer inclusive of L2.
At the present, the "street" scalper price on a 5600x is ~$400 and up (I see plenty for $420). A 10600k is already $130-$150 lower than that. So what you are imaginging already exists.
Also bear in mind that the 11900k will only be 8c, so in a sense the 10900k may still be the "halo" product on Z490.
I meant 11600K. 10600K has to be cheaper due to performance and feature deficit. But if 11600K has perf/feature parity and is 100 eur cheaper? Why should person buying it care about 11900K pricing?
I leave caring about those things to Intel marketing department, if they released 1Ghz, 4C, 200W chip that is twice as fast as my current 10900K in ST ( and by definition ~as fast in MT as 8C Skylake ) - I'd be first in line to buy it.