Discussion Intel current and future Lakes & Rapids thread

[TheGiant]

Just to be clear, my post was intended as warning, Whiskey Lake boosts a heck of a lot higher than KBL-R so it fills a lot of ST heavy holes nicely and likely gets significantly higher performance numbers.

However, ARM is on a +XY% IPC improvement yearly crusade and they won't stop anytime soon. Cortex-A77 is looking fine and dandy and they have further plans set in place with obvious TAM expansion:

We need to see a far more agile and humble Intel. And we need to see ICL-U performing ASAP.

I see it with Apple, ARM

why not x86 ? or it is just Intel being slow?

 

[amrnuke]

I see it with Apple, ARM

why not x86 ? or it is just Intel being slow?

I think the reason x86 advancement is going slower is just the simple cost of dedicating transistor space and processing power to the more flexible and powerful, and also more complex and (to some) archaic ISA. Because of tacked-on instruction sets (SSE, AMD64, etc), legacy support (e.g. for 16-bit code even!), limited registers, and so on - it comes at a cost. There has to be die space and processing power dedicated to supporting all of that, whereas on ARM that's not quite as severely limiting.

In the end, both have their limitations and benefits.

I am not sure how all this overhead for x86 scales as speeds/cores go up, so I'm not sure how large of a role it plays, but I hypothesize that it eats into the gains they make from higher clocks and better IPC.

For ARM I'd imagine their die space dedication to out of order execution is going to start to eat up some gains as well. Their own roadmap sees some limitation coming to gains in the next couple of cycles compared to the 75-76 and 76-77 jumps.

 

[ajc9988]

Yup Intel used dual channel for AMD

https://twitter.com/x/status/1132960655730970627

So they just choked in memory capacity, not bandwidth and latency, even if that seems low considering official supported speeds and Intel's memory speed, which still shows deceptive.

 

[IntelUser2000]

ridiculous considering Qualcomm needs to punch through the emulation penalty as well.

I don't think its emulation. PCMark and Qualcomm worked together on PCMark10. Since that chart showing A76 equal to 7300U is wrong I would still wait to see how it really performs. You need the Daimos part running at similar frequencies to 7300U to be in splitting distance.

I see it with Apple, ARM

why not x86 ? or it is just Intel being slow?

Whether its not ISA or not is a separate matter to Intel standing still in terms of uarch over the few years. According to the original roadmap, it should have been not Tigerlake, but the chip after that we're expecting this year. Yet we're ending up with barely-Icelake.

 

[Bouowmx]

https://fuse.wikichip.org/news/2370...ocessors-based-on-10nm-ice-lake-now-shipping/
Images of Ice Lake-U/Y, and specifications of package size: use to approximate die area.

Using the U chip package: 0.06 mm/pixel; 179*192 pixels -> 124 mm^2

 

[TheGiant]

https://fuse.wikichip.org/news/2370...ocessors-based-on-10nm-ice-lake-now-shipping/
Images of Ice Lake-U/Y, and specifications of package size: use to approximate die area.

Using the U chip package: 0.06 mm/pixel; 179*192 pixels -> 124 mm^2

that looks mighty improvement 18% IPC
lets wait for the official benchces, looks like the new notebugs should be around soon

edit:
we have it, precious! https://www.tomshardware.com/news/dell-xps-13-2-in-1-ice_lake-specs-price,39455.html

 

[Abwx]

So they just choked in memory capacity, not bandwidth and latency, even if that seems low considering official supported speeds and Intel's memory speed, which still shows deceptive.

They used a commercial laptop that has a GForce 1660, it can only be the Asus ROG Zephyrus, and it s single channel out of the box with only one slot populated with a 8GB stick precisely, so Ryan Shrout is not accurate at all to say the least..

Beside the laptop has a 35W APU that can be set at 12-35W in the bios, they surely set it to 25W this way....

https://geizhals.de/asus-rog-zephyrus-g-ga502du-bq015t-90nr0213-m00610-a2042348.html?hloc=at&hloc=de

It’s double channel, intel confirmed this (well Ryan Shrout)

LOL...

See the laptop they used, and he stated 8GB dual channel OUT OF THE BOX...

That being said more info on ICL-U here :

https://www.computerbase.de/2019-05/intel-ice-lake-ueberblick/

 

[TheGiant]

that Icelake looks good
if 15W U series can do short burst of 4.1GHz, with 65W there shouldn't be a problem for 8C/16T desktop parts at 4,5GHz turbo?
Or I am thinking wrong?

 

[ZippZ]

that looks mighty improvement 18% IPC
lets wait for the official benchces, looks like the new notebugs should be around soon

is the 18% IPC improvement compared to a security patched system? If so then the real improvement may be 0 to 10%

 

[majord]

that Icelake looks good
if 15W U series can do short burst of 4.1GHz, with 65W there shouldn't be a problem for 8C/16T desktop parts at 4,5GHz turbo?
Or I am thinking wrong?

Well the initial 15w parts burst to 3.9Ghz Max.

Current whisky lake, 15w i7's burst to 4.7?

Quite telling of the issues with 10nm really.

Also intersting the 'per core performance; comparison slide, showing a small (3-4%) improvement over whisky lake - is Spec int_Rate - maybe levering the newfound LPDRR4 bandwidth to boost result.

It would seem outside of this , based on the claimed IPC improvments for Icelake (which are pretty damn good) vs freq regression, it may actually be slower in raw ST than Whisky lake on avg.

 

[IntelUser2000]

that Icelake looks good
if 15W U series can do short burst of 4.1GHz, with 65W there shouldn't be a problem for 8C/16T desktop parts at 4,5GHz turbo?
Or I am thinking wrong?

The 15W mobile parts have a 4.8GHz Turbo. So yes, its probably too optimistic. But we won't see Icelake desktop.

Spec int_Rate - maybe levering the newfound LPDRR4 bandwidth to boost result.

SpecInt is not very sensitive to memory bandwidth. SpecFP is. And its a 1 core SpecInt.

 

[coercitiv]

is the 18% IPC improvement compared to a security patched system? If so then the real improvement may be 0 to 10%

Let's leave the security issues aside for a while, we're talking laptops not servers.

The 18% IPC jump looks good when compared with the competition, but not that great when compared to Whiskey Lake's higher than 10% frequency advantage. I would remain cautiously optimistic until we get independent benchmarks, as we may still see just 3-5% improved performance on the CPU front, which is disappointing for a node jump. The only hope I have is for sustained clocks for MT loads, although I'm pretty sure Intel would have found a way to put this info in their press deck.

 

[TheGiant]

Let's leave the security issues aside for a while, we're talking laptops not servers.

The 18% IPC jump looks good when compared with the competition, but not that great when compared to Whiskey Lake's higher than 10% frequency advantage. I would remain cautiously optimistic until we get independent benchmarks, as we may still see just 3-5% improved performance on the CPU front, which is disappointing for a node jump. The only hope I have is for sustained clocks for MT loads, although I'm pretty sure Intel would have found a way to put this info in their press deck.

that whiskey lake doesnt look so good
https://www.techspot.com/review/1847-intel-core-i7-9750h-vs-8750h/
ofc short bursts will be faster, or much faster
wanna see the real results on power, noise, heat etc
so far looks excellent

 

[IntelUser2000]

Honey I shrunk Gen 11!

🙂

@coercitiv Remember that I speculated that the GPU portion must have got the claimed density increases in 10nm, while the CPU portion got the historical 50% shrink. Now I have got proof.

From the package sizes Intel has revealed, the rough die size of Icelake is 124mm2(off by plus/minus 2mm2). The 64 EU Gen 11 GPU takes up 40mm2.

24EU Gen 9 GPU in Skylake takes up 44mm2. Now that doesn't look so bad since Intel said the EUs got a 25% reduction.

Consider though, how big the GT4e Skylake is. The total die area nearly doubles from 122mm2 to 232mm2(plus/minus 2mm2). I pixel counted from Wikichip's layout and I got 124mm2 for the iGPU.

That's a 3.1x the size difference. Assuming that there's overhead, I think we can assume a 2.7x density improvement.


Consider the CPU. The single core Skylake with the L3 cache is little over 11mm2. Icelake is at 6.8mm2. It's a 40% size reduction. It probably got the 50% reduction, but addition of resources got that back up.

 

[IntelUser2000]

I would remain cautiously optimistic until we get independent benchmarks, as we may still see just 3-5% improved performance on the CPU front, which is disappointing for a node jump. The only hope I have is for sustained clocks for MT loads, although I'm pretty sure Intel would have found a way to put this info in their press deck.

I sort of expected this, but I hoped it would be more extreme. So say a 30% frequency drop with 50% perf/clock gain, which would again end up about 1.

Why? Because if we assume 5GHz is the hard limit in clocks, and 4.5GHz is for sane chips, then a greater perf/clock with a frequency drop would mean scaling for the future. I'm greatly simplifying this, but this seems to be the unavoidable way to go.

Also in laptops, addition of the FiVR not only in the CPU, but in the PCH will result in further battery life gains in realistic scenarios. Smaller form factors will either allow for greater battery capacities, or lighter thinner devices. Competitive GPU and, thunderbolt/USB-C integrated with the CPU-die seems pretty good.

 

[coercitiv]

Honey I shrunk Gen 11!

Now let's wait and see the GPU clocks 😀

 

[TheGiant]

I sort of expected this, but I hoped it would be more extreme. So say a 30% frequency drop with 50% perf/clock gain, which would again end up about 1.

Why? Because if we assume 5GHz is the hard limit in clocks, and 4.5GHz is for sane chips, then a greater perf/clock with a frequency drop would mean scaling for the future. I'm greatly simplifying this, but this seems to be the unavoidable way to go.

Also in laptops, addition of the FiVR not only in the CPU, but in the PCH will result in further battery life gains in realistic scenarios. Smaller form factors will either allow for greater battery capacities, or lighter thinner devices.

linking that https://www.techspot.com/review/1847-intel-core-i7-9750h-vs-8750h/ whiskey lake endurance test

Intel got master job adjusting what they can get from 14nm, but they can't bend the thermals in long term workloads

I am expecting from Icelake to sustain higher clocks (my guess 3,6GHz all core), with better IPC it should result in
Whiskey lake- 3,1GHz 4C/8T clocks
Icelake - my 2C guess 3,6 GHz
with we say 18% IPC bump, 3,6x1,18/3,1= 1,37, so 37% performance bump
that is massive for a laptop

lets wait for official benches

I am looking for my i5-6300U replacement in surface pro 4, which has a fan and it is just 2C/4T CPU
this icelake looks promising

 

[IntelUser2000]

Now let's wait and see the GPU clocks 😀

1.1GHz GPU Turbo peak, which is a slight drop. The last time they did was from 1.3GHz to 1.2GHz in Ivy Bridge.

 

[coercitiv]

1.1GHz GPU Turbo peak, which is a slight drop. The last time they did was from 1.3GHz to 1.2GHz in Ivy Bridge.

so they did pinch clocks a bit, but less then I thought, was expecting something more substantial like 10%.

 

[DrMrLordX]

with 65W there shouldn't be a problem for 8C/16T desktop parts at 4,5GHz turbo?

What desktop parts? Did Intel actually release a roadmap with IceLake-S on it?

 

[IntelUser2000]

so they did pinch clocks a bit, but less then I thought, was expecting something more substantial like 10%.

Uhh, 1.2GHz to 1.1GHz is pretty much 10%?

Ah, I see the current Whiskey Lake parts are at 1.15GHz.

The Dynamic Tuning 2.0 feature is interesting too. It's the first modification since Turbo 2.0 in Sandy Bridge. It uses VNNI and deep learning features in Icelake to make it more optimal, so it'll be able to stay in PL2 longer. So rather than being at 3GHz for 10 seconds, it might switch between 3GHz and 2.5GHz within that time period, and multiple times.

This isn't done using violations in TDP spec(like with Kaby/Coffee parts) but a more fine graining of clock adjustments. Little doubt it works in conjunction with FIVR.

 

[TheGiant]

What desktop parts? Did Intel actually release a roadmap with IceLake-S on it?

no I dont have any

just guessing

why is there a problem to release 8C/16T desktop S parts?

capacity? yield?

 

[coercitiv]

Uhh, 1.2GHz to 1.1GHz is pretty much 10%?

We've grown used to the clocks on higher wattage parts, the ultra mobile SKUs topped at 1.15Ghz for KBL-R and Whiskey, they were even lower at 1.05Ghz with Kaby Lake.

The Dynamic Tuning 2.0 feature is interesting too. It's the first modification since Turbo 2.0 in Sandy Bridge. It uses VNNI and deep learning features in Icelake to make it more optimal, so it'll be able to stay in PL2 longer. So rather than being at 3GHz for 10 seconds, it might switch between 3GHz and 2.5GHz within that time period, and multiple times.

Yeah, read a bit about it, I'm intrigued. Looking forward to a deep dive from Anandtech or other reviewers willing to get their hands dirty and test the heck out of it.

 

[IntelUser2000]

why is there a problem to release 8C/16T desktop S parts?

Because the enthusiast desktop chips have the most strenous requirements.

Servers
-Need large dies
-However, the clock requirements aren't so demanding
-The chips have high margin so they can put more effort into it

Mobile
-Moderate margin
-Needs to be efficient
-Large volume

Desktops
-Lowest margin
-Low volume
-Highest clocks

Yeah, read a bit about it, I'm intrigued. Looking forward to a deep dive from Anandtech or other reviewers willing to get their had dirty and test the heck out of it.

Articles are also saying it needs work from the software side. So perhaps something at least like a patch is required.

 

[jpiniero]

Ah so the crazy 10 Gen naming is true - although they put a space.

The XPS comes with the options of:

i3 1005 G1 (2 cores, 32 EUs, 3.4 max)
i5 1035 G1 (4 cores, 32 EUs, 3.7 max)
i7 1065 G7 (4 cores, 64 EUs, 3.9 max)