The article made it sound like This Kensfield will be introed before year end, if so, Intel seem to be keeping up its attacks on AMD relentlessly.
Yeah, kick em while their down. Thats corporate strategy for ya. ::chuckle:: I know AMD's 4x4 isnt due to luanch till 2007 but I betcha AMD will move that date up as quickly as possible. Still, Intel probably wont have that many Quad cores availble this year. After January 1 is when its production will probably really kick into gear. Prices wont be less than 1k each anyway at first.
Lets see... I upgrade two PCs to Conroe this year and next year upgrade the third to quad core once they come down in price. Sounds like a plan to me!
Cookie Monster
Diamond Member
- May 7, 2005
- 5,161
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I don't know about everyone else, but I can always use a faster processor. It comes in VERY handy with compression.
Rock Hydra
Diamond Member
- Dec 13, 2004
- 6,466
- 1
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Jesus, these gains are amazing. This may ensure that I can pick up a Core 2 Duo even cheaper now.
This is very likely going to be my next upgrade. Although not till January or February next year.
Seems the AMD fanboys here have done their best to declare Kentsfield a "waste" because "most" software can't take advantage of 4 cores. They conveniently forget those of us who do advanced 3D rendering, video compression, et al. which can and will make use of every bit of processing power.
DrMrLordX
Lifer
- Apr 27, 2000
- 22,718
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I wouldn't attribute that to AMD fanboys per se. Anyone making an argument like that is also arguing against 4x4 and quad-core K8L.
After reading Duvie's old 2p dual-core Opteron benchmark thread, it seems to me that a lot of the "power-user"ish apps he ran struggled to fully utilize more than two cores.
slatr
Senior member
- May 28, 2001
- 957
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Bring on the quad cores!
With Modo , www.luxology.com , I can set the number of threads to auto, 1, 2, 3 or 4.
What is interesting on my core2 duo, 4 threads is consistently faster.
With Modo , www.luxology.com , I can set the number of threads to auto, 1, 2, 3 or 4.
What is interesting on my core2 duo, 4 threads is consistently faster.
SMT will make its way back soon enough. The wide uarch of Core2 is better suited for SMT than a long narrow pipeline, argueably.
Do you guys pay attention to any of the articles I have written? I showed these same results with quad cores of dual dual core opterons months ago...Why are so surprised??? Just cause lame-O THG says it...
Fact is as I stated then that video encoding is not making good use of anything above 3 cores...I get gains from 2 to 3 in most things but it is near minimal using the 4th core....I speculated a bit but figuired perhaps IO was becoming a limiting factor.....When I would do HD content I got the best use or gains over 2 cores but it was not total use...
divx saw 20% gains in additional 2 cores versus same speed x6700
Xvid saw no gains looking at x6700 versus same speed quad...
Clone DVD saw no gains looking at x6700 versus same speed quad...
HDTV res stuff is where it is at and I did some testing to show it will be the only thing taxing enough for this chips to be needed....
Fact is as I stated then that video encoding is not making good use of anything above 3 cores...I get gains from 2 to 3 in most things but it is near minimal using the 4th core....I speculated a bit but figuired perhaps IO was becoming a limiting factor.....When I would do HD content I got the best use or gains over 2 cores but it was not total use...
divx saw 20% gains in additional 2 cores versus same speed x6700
Xvid saw no gains looking at x6700 versus same speed quad...
Clone DVD saw no gains looking at x6700 versus same speed quad...
HDTV res stuff is where it is at and I did some testing to show it will be the only thing taxing enough for this chips to be needed....
Keysplayr
Elite Member
- Jan 16, 2003
- 21,211
- 50
- 91
From Overclockers.com
"Another caveat is that Intel?s acclaimed ?Hyperthreading? feature is for the time being disabled on all current Core 2 Duo processors. Hyperthreading allows running 2 threads per execution core, instead of normally only 1. Intel is mentioning HT capability in their Core 2 Duo documentation and we assume therefore that they will enable it for future versions to keep the product line attractive over its life cycle."
So, we may see HT return in another form within the next few gens. (Guess)
if it is like what it was, and then by all accounts of reviews done by even AT back in the day it will have little or no effect....
with a shorter pipeline versus the netburst architecture there will be less stalls and therefore will negate most of its benefits it had....It was worth 20% in some things in the northwood days....hurt application in multitasking as seen in THG review of a dual core versus the EE version with 4 virtual cores....
Remember when ppl stated that HT for AMD would have had limited to NO benefit.....well I would think C2D architecture would be the same....
It will be more of a PR thing and wont deliver versus its pricetag no doubt....
Why? It depends on your SMT implementation. The P4's implementation was designed on a long, narrow pipeline. Conroe, is obvious wide and short. Itanium is wide and short and has SMT as well (with rather modest performance gains in the server arena). I believe Sun's 8 core Niagara is narrow AND short, but each can execute 4 threads at a time.
The SMT thing being a coverup for the "highly inefficient" Netburst uarch was just nothing but fanboi spew who knew nothing about the high level concept of SMT. However, to answer your question, I believe SMT works best in Wide+Short. Now the reason why SMT is rare, as mentioned, was that even though it accounted for 5% of the die space, it probably accounted for 90% of the debugging. In AMD's case, it was just far easier to make Dual-Core than go for an SMT implementation. Not to say, I believe an DC-SMT X2 would've held some nice performance gains, especially in the server area. But again, there are time constraints, and its a known fact Intel is a bigger company with far more resources and thus they can waste 90% of their debug time; something AMD can't do easily.
The real question is, is it worth it to debug SMT? It'd be easier to throw native Quad-Core than having a DC-SMT CPU, to my knowledge. However, sooner or later, you're going to run into scalability problems (mainly due to heat dissipation from multiple complex cores on 1 socket), and thats when SMT will be useful on a performance/watt basis.
My .02
well I can tell you it was not fanboi speak!!! It was charts from all the regular hardware sites....That showed that due to the long pipeline of the P4 there was time when the pipe could not stay full due to items I guess like incorrect branch pr4edictions etc...above my lingo but none the less the charts showed this well...even the chart at Intel own websaite I believe showed this...
However short and wide would not seem to fit that same theory....The pipe is shorter thus delays or hits due to the above would not cause much of a stall, and thus not get much execution of anything from a 2nd thread done....You can fill that wide path but the fact is the cpu should stay relatively busy with the single thread...thus not much of the 2nd thread will get done...hence why I dont think it will be as productive as the P4 netburst HT implementation...
Sun can run 4 threads but if they only have 1 core then you are just slicing up the same pie....unless they were so inefficient keeping the pipe full I dont see how 4 thread on 1 core would be faster then 1 thread on 1 core..as long as the pipe can stay full of data
I would like to learn more so keep it coming....
My 2 cents is based on what I read at the time from the respectable review sites...they were often the ones who commented on the likelihood AMD would implement this and why not....
Unless we are talking about another incarnation of HT (hyperthreading)!!!
Why wouldn't short and wide work? Instead of a long pipeline, you're just scheduling more work per cycle (as opposed to wasted cycles). Its the same concept, but on a different approach. To my knowledge, the idea of SMT is just so that you can use what would've been unused cycles. Its a matter of keeping the pipeline filled or keeping the execution units busy.
Its notoriously parallel. The whitepapers said it was 1 die having 8 cores capable of executing 4 threads each. So 1 die can execute 32 threads in parallel. Highly useful for something like web serving.
HT was just a name given by Intel's marketting department for the P4 implementation of SMT. Whether they keep that has nothing to do with SMT. Regardless, every company spews PR. The PR's job is to spin why they don't have certain features and put it into the marketting perspective of how the consumer doesnt need it or it has a restricted usefulness.
Arstechnica Forums had a debate on SMT + Conroe. I believe the general consensus was that Wide+Short was the best for an SMT implementation. However, everything boils down to debug time. And for some reason, I doubt Intel would've waited another year or so just to put SMT on Conroe. Regardless, at IDF, they said something similar to a 300% increase in performance/watt within a generation. I don't see how thats possible WITHOUT some kind of SMT. Again, I could be vastly mistaken and they could pull some magical CPU design from a hat (kind of like how the original Pentium-M Banias surprised me).
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