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*Intel and AMD Processor Roadmaps (Tbred, Hammer, Northwood). UPDATE: Now Includes a New Motherboard Thread*

A

AGodspeed

Diamond Member
UPDATE: I've created a brand new thread for motherboards as well. Visit my new Motherboard Thread for i845E, i845G, and i850E Chipsets.

The purpose of this thread is to aid the forum members of the AnandTech by compiling a comprehensive and updated list of official and "unofficial" processor roadmaps from Intel and AMD.

More often than not, I find a lot of repetitive threads on the AnandTech forums, asking questions like "When are the new Intel chipsets coming?" or "When is the AMD Hammer Going to be Released?", etc. etc. Every so often I will update this thread so you guys will know when the latest processors are coming and when to purchase one.

Now on to the roadmaps. 🙂

Advanced Micro Devices. Official Roadmaps:

- Official AMD Processor Roadmap

- Here's Some More Official AMD Processor Roadmaps

- This Official AMD press release concerning the AMD 8000 Series of Hammer chipsets mentions that final samples of ClawHammer processors will start shipping during the 2nd quarter of 2002 with retail availability by the end of the year.

- This Official AMD press release at the Intel Developer Forum in San Francisco reveals AMD's first public demo of the ClawHammer processor, running 64-bit Linux and 32-bit Windows operating systems. Extremetech reported additional information about this demo as well. This info was taken directly from vice-president and chief technical officer at AMD, Freb Weber, who said:

Clawhammer processors...will be on sale in the fourth quarter.

In addition, Freb Weber also revealed to Extremetech that:

Clawhammer is expected to run under a native 64-bit OS with 64-bit applications, a 64-bit OS with 32-bit programs, or under a true 32-bit OS and using 32-bit applications.

- AMD official John Crank has confirmed that "Thoroughbred" will kept the exact same amount of L1 and L2 cache as the current Athlon XP Palominos as well as the same 266MHz FSB.

So now that we've compiled AMD's most important official roadmaps and press releases, here's a quick summary of AMD?s desktop and mobile processor plans:

Q2 2002:

- Athlon XP 2200+ Desktop (.13-micron = "Thoroughbred" core)
- Duron Desktop *Undecided* through 2003
- Athlon 4 1900+ Mobile (.13-micron = "Thoroughbred" core)

Q3 2002:

- Athlon XP 2400+ Desktop (.13-micron = "Thoroughbred" core)
- Athlon 4 2000+ Mobile (.13-micron = "Thoroughbred" core)

Q4 2002:

- Athlon XP 2800+ Desktop (.13-micron SOI = "Barton" core)
- ClawHammer 3400+ Desktop (.13-micron SOI)*--> (AMD formally switches from the K7 architecture to the K8 architecture)
- Athlon 4 2200+ Mobile (.13-micron = "Thoroughbred" core)

Q1 2003:

- ClawHammer DP (.13-micron SOI. 1-2 way server/workstation processor)

1H 2003:

- ClawHammer 4000+ Desktop (.13-micron SOI)
- Athlon 4 2400+ Mobile (.13-micron = "Thoroughbred" core)

2H 2003:

- ClawHammer 4400+ (.09-micron SOI)
- ClawHammer 3500+ Mobile (.09-micron SOI)

Advanced Micro Devices. Unofficial Roadmaps

3rd party web sites have just a few minor unofficial things to add to AMD's official roadmaps.

According to this web site (and too many others to link to), AMD's Thoroughbred core processors will scale to the model rating of 2600+, just before "Barton" (.13 SOI process) processors are released at higher frequencies later in the year along with ClawHammer.

According to this web site AMD's new ClawHammer processor will launch in October. No other details were given except that there would be availability of ClawHammer processors during that quarter (starting in October presumably) along with Barton processors (based on the K7 architecture).

These ClawHammer and SledgeHammer Pictures are courtesy of Anand himself 🙂. The pictures are quite amazing, please click the link to see these cool pictures for yourself. Here's a little info from Anand:

The first thing we noticed about the CPUs is that they look a lot like the Socket-478 Pentium 4 processors. In fact, AMD did borrow quite a bit from Intel in designing the packaging of the CPUs as both the ClawHammer and SledgeHammer parts feature integrated heat spreaders (IHS), a technology which Intel has been using for almost two years now. This means that there will no longer be any horror stories of crushed cores from poorly installed heatsinks or badly manufactured heatsink clips.

By far the most interesting thing about the CPUs from a physical standpoint is their pincount. The ClawHammer has 754 pins (up from 462 on the Athlon and even up from 603 on the Xeon) and the Sledgehammer has a whopping 940 pins which is just over twice as many as the current generation Athlon.

In addition to Anand's Claw and Sledge Hammer pictures, a fellow AT forum member, Bluga, has compiled 10 different pictures from other sites around the web. Here they are:

Pic #1
Pic #2
Pic #3
Pic #4
Pic #5
Pic #6
Pic #7
Pic #8
Pic #9
Pic #10

For some technical information regarding AMD's 8th Generation K8 Hammer Architecture, see this white paper.


Intel Corporation. Official Roadmaps:

- Official Intel Processor Roadmap

- At The Intel Developer Forum, Intel finally released more information about its future plans for the Pentium 4.

The next Pentium 4 processor is codenamed "Prescott" and will include the following modifications:

1. .09-micron die shrink from .13-micron "Northwood" core.
2. Additional unspecified micro-architectural enhancements.
3. Hyper-Threading Enabled.

According to Intel, "Prescott" will ship during 2H 2003.

Besides what has already been listed above, Intel has not revealed any additional official information regarding their future plans for the Pentium 4. Intel usually gives very broad and not very revealing details about their desktop and mobile roadmaps, so we?ll have to rely on 3rd party web sites for additional information instead.

Intel Corporation. Unofficial Roadmaps:

3rd party web sites have some much more detailed roadmaps of Intel's future processor release dates.

For Intel's desktop plans, according to this web site, the following is true:

Pentium 4 (all CPUs utilize .13 micron "Northwood" core):

- Q2'02: two CPUs for 533MHz Quad Pumped Bus (working at 2.26GHz and 2.4GHz) and one for 400MHz QP (2.4GHz).
- Q3?02: 2.53GHz (533MHz QP) and 2.5GHz (400MHz QP).
- Q4?02: 2.66GHz and 2.8GHz (both for 533MHz QP) and 2.6GHz (400MHz QP).
- Q1?03: "3.x GHz" (no exact frequencies announced).

Celeron:

- Q1?02: no new models to come.
- Q2?02: 1.4GHz PIII "Tualatin" core (256K L2 cache, the last of its kind). 1.7GHz Pentium 4 "Willamette" core (128K L2 cache).
- Q3?02: 1.8GHz Pentium 4 "Willamette" core (128K L2 cache).
- Q4?02: 1.9GHz Pentium 4 "Willamette" core (128K L2 cache).
- Q1?03: 2.0GHz Pentium 4 "Willamette" core (128K L2 cache). 2.0GHz Pentium 4 "Northwood" core (L2 cache size hasn?t been announced)

In general, Intel has been releasing Pentium 4 processors a little more quickly. This includes the 2.53GHz Pentium 4 and 1.8GHz Pentium 4 Celeron Willamette processors.

According to this web site (and several others), Intel has some fairly interesting things scheduled for the not so distant and distant future.

H2 2002

- Granite Bay : P4 400/533Mhz FSB, Dual Channel DDR200/266, AGP 8X, USB 2.0, ICH4
- Placer : Prestonia 533Mhz FSB, Dual Channel DDR200/266, AGP 8X, USB 2.0, ICH4

H1 2003

- SpringDale : P4 Prescott (0.09 micron), AGP 8X, DDR-II or DDR333 or Dual Channel DDR, Integrated Graphics, ICH5, Serial ATA, Gigabit Ethernet, Wireless LAN?
- SpringDaleG : P4 Prescott (0.09 micron), AGP 8X, DDR-II or DDR333 or Dual Channel DDR, ICH5, Serial ATA, Gigabit Ethernet, Wireless LAN?

In addition to Intel's desktop plans, it is believed that Intel is working on a secret project codenamed "Yamhill" that is aimed at the same market as AMD's "Hammer" processors. The San Jose Mercury News reported the following (details of which you can find here):

An anonymous engineer reported to The San Jose Mercury News that Intel is secretly working to develop 64-bit extensions to the upcoming Prescott Pentium 4 chip, codenamed Yamhill.

Public sources are obviously very quiet on this topic since a public announcement of this work represents a tacit admission that the Itanium?s $1 billion architecture is on the verge of finding itself stuck in a tiny niche of the market.

It is commonly believed that Intel engineers are working within the x86-64 architecture, defined by AMD, in order to build off the established AMD Hammer software infrastructure which will inevitably be developing during the year after Hammer is released but before the 64-bit Yamhill is available.

Intel declined to comment on unannounced products, but several inside sources confirmed the existence of Yamhill.

I would love to go into detail about Intel and AMD's future server/workstation processor plans (like AMD?s SledgeHammer or Intel?s McKinley) but I'm afraid that packing it all into one thread wouldn't do it justice enough. Also, since the point of this thread is to help you guys time your purchases correctly, I'm betting the majority of you aren't going to be looking into a McKinley or SledgeHammer processor for your next upgrade. 🙂

Please feel free to PM me with any news that you may find regarding Intel and/or AMD's roadmaps.

This thread will be updated every so often.

Enjoy! 🙂
 
Thank you for the links, I was wondering about the future P3Ms and P4ms. How believable of a source is the Inquierer though?
 


<< Thank you for the links, I was wondering about the future P3Ms and P4ms. How believable of a source is the Inquierer though? >>



Thank you for reminding me, I forgot to add this link about Intel's P4-M plans. Go to my first post for more details.

Unfortunately, Intel, like AMD, hasn't revealed very much about their mobile processors plans (3rd party web sites have been no different).

For the links I provided, The Inquirer is very probably accurate. Other web sites have sources that confirmed what The Inquirer got from their sources. The price list and the May 20th release date I listed, for example, were first reported by The Inquirer and then corroborated by several other hardware sites. In fact, Intel's "Yamhill" project was first reported by The Inquirer nearly 2 YEARS ago, and nobody believed them. Now that other news sites have corroborated The Inquirer's news story, more and more people are inclined to believe it...
 
Actually, I think the Inquirer probably just reposted what was made known by other more reputable sources. Xbit does the same thing.
 
i very much doubt that the p4 celerons will be willamette core, unless intel is having difficulties moving fabs over to .13. the die size is just too big, even with the castrated cache, in comparison to the northwood, for a value part. i would imagine we'd see more of the same trend as we have with the p6 and celeron, the celermine, tualeron, and probably a celerwood or northeron is the p7- based celeron, not a willeron.

imagine the die size on a northwood - 128 (or 256). sure, cache is dense, but its still quite a bit of space.


how many transistors is a northwood anyway?
 


<< i very much doubt that the p4 celerons will be willamette core, unless intel is having difficulties moving fabs over to .13. the die size is just too big, even with the castrated cache, in comparison to the northwood, for a value part. i would imagine we'd see more of the same trend as we have with the p6 and celeron, the celermine, tualeron, and probably a celerwood or northeron is the p7- based celeron, not a willeron.

imagine the die size on a northwood - 128 (or 256). sure, cache is dense, but its still quite a bit of space.


how many transistors is a northwood anyway? >>

I'm not sure whether Intel will use Willamette for the Celeron, it does seem pretty stupid, you would think Northwood would be cheaper. I guess not.

Anyway, the Northwood Pentium 4 has 55 million transistors, whereas the Willamette Pentium 4 has 42 million transistors..
 
Northwood (.13 um) is a cheaper process! I heard they can make about 4 times as many northwood processors per wafer than wiliamettes! A smaller process uses less material, making it cheaper! Just like ElFenix, unless intel is having serious problems shifting over to the .13 um process (which makes no sense seing that all Intel chips are using .13um now: Tualatin Celeron/ P3 and now Northwood P4), then using old .18um willimettes as new celerons doesn't make sense.
 
of course... fab equipment ain't cheap... and intel does have a lot of .18 sitting around... so while the variable cost on the .18 stuff is higher than it would be, the fixed cost is very low since the stuff has been used before and is paid for already. so it could be cheaper for them to use the old equip with a smaller die version of the willamette core for the time being while letting the new .13 stuff work on high margin parts.



must say this idea is attributed to someone else but i can't say who 😉
 
Just want to say that at warp2search.com, i saw an Asus bios (new) that supports AthlonXP 2100+...
which would say that 2100+ is coming out very soon, which could again bring the crown back to AMD
 


<< Just want to say that at warp2search.com, i saw an Asus bios (new) that supports AthlonXP 2100+...
which would say that 2100+ is coming out very soon, which could again bring the crown back to AMD >>

Assuming you don't overclock. 🙂
 
Tom posted benchmarks of the forthcoming P4 cpus with 533FSB; he tested the 2.4GHz (week of May 20), 2.53GHz (week of July 20), and 2.6GHz (week of October 20) parts. Here it is: Tomshardware's, "Behind The Silicon Curtain: P4/2666 With 533 MHz Rambus"

Here's a nice quote:

"Our benchmark results clearly prove that if Intel changes the FSB and memory clocks (to 133 MHz and 533 MHz, respectively), this will put it quite a distance ahead of its competition from AMD, as well as its own series of processors. In the Office Performance category, the Pentium 4/2666 with 533 MHz RDRAM soars about 50% above the fastest AMD Athlon XP 2000+ (VIA KT333 platform and DDR333). In MPEG-2 video encoding, the Pentium 4/2666 is approximately 25% ahead of the AMD Athlon XP 2000+ (VIA KT333 platform). What's more, the P4 2666/533 achieves higher benchmark results than a P4 3000/400 in some categories ."

"Our detailed tests show that forthcoming P4 CPUs with 133 MHz FSB clock used in conjunction with the 845E chipset (DDR SDRAM support) will effectively be castrated."
 
My opinion is that if the P4 requires RDRAM, goodbye P4! I don't need all that RDRAM business. I'd be better off with Athlon XP and DDR than to fork out hundreds just to achieve at least some kind of performance with the P4.

Thats why intel is releasing dual channel DDR chipsets this summer,i.e 4.2gb/s bandwith. And if you think your having to fork over a ton of money for an RDRAM based system , 256mb Samsung RDRAM is now 10 dollars cheaper than Crucial DDR RAM. Intel in no way has castrated their P4 Line. They are just giving the consumer more options. Anyway with those types of statements ....might want to back it up with some benchmarks.
 


<< A better title for this thread would be "Official AMD, and Totally Unofficial Intel, Processor Roadmaps. 😀 >>

LOL, well if you can find some better official Intel roadmaps or statements that don't go something like "533MHz FSB will debut this year", then I'd be more than willing to post it. 🙂
 
AGodSpeed,

Those pics of the CH really look so sweet. The CH really looks like a beast :Q There's over 700 pins on a CPU base the size of a P-4 478 chip! It's really stunning. I doubt if even the biggest Intel Zealot isn't impressed with the Claw Hammer. Now I've got something to drool over till Dec 2002. If I'm lucky, Santa may gift me one for Christmas 😉 (yeah, I know it's 9 months away)

 
Intel to drop support of Rambus in new CPU Products

<< Intel Corp. in the second half of this year will drop its final Direct Rambus DRAMs support in new computer products, it was learned Tuesday at the Intel Developers Forum.

The last RDRAMs used in Xeon workstations will be replaced by new chipsets supporting double data rate (DDR memory).

An Intel workstation roadmap secured by EBN showed a Placer chipset with DDR SDRAMs for dual processor Xeon workstations, and a Granite Bay DDR chipset for uniprocessor Xeon workstations. They will replace the Intel 860 workstationchipset using RDRAM and Intel 850 with RDRAM.
>>

 
While deeply despising RAMBUS' way of selling their products, I am not exactly sure whether this is a good time to drop its products. When both RDRAM is cheaper than DDR-SD-RAM and faster, than why get rid of it? Especially since it looks like this technology at least for the short run offers more performance headroom than DDR, where QDR and DDR II seems to be far off down the road.
 
Any one know when Intel will introduce a USB 2.0-integrated chipset in PCs?
How can I tell the chipset has USB 2.0-integrated into it.
Anyone know which chipset?
thanks,
 
new2pc,

The integrated USB2.0 will come with the ICH4 southbridge. The ICH4 southbridge will ship with Intel's DDR chipset in May.
 
Here's a nice bit from jc-news:

We have some more data on AMD's Hammer presentation. Firstly, you can go over to Chris Tom's (AMDZone) for a copy of it. Here's a quick rundown of some of the features listed for the Hammer (we've heard of most of these, but some are nice surprises and other confirm speculations:
* Enlarged 2-level TLB
* TLB flush filter
* Enhanced branch prediction
* Large caches (meh...)
* ECC and chipkill (chipkill is actually sort of cool -- if a chip on one of your DIMMs dies, the system can simply disregard that DIMM and continue operating -- good stuff for mission criticalness)
* PC2700 (only single channel for claw, which is mildly annoying but means that the performance difference between the low end and the high end x86-64 chips will actually be nontrivial!)
* Memory controller at cpu clock (I wish that AMD would give a latency comparison in cycles between the Hammer and the AMD760MPX)
* Memory bandwidth scales with number of cpus (if AMD ever releases high-way systems, then this could be a strong trump against Intel's shared bus)

And there's coverage of the demo floating around now. Anand posted a nice article giving out some information. Because the processors now have half a north bridge attached to them, they have rather large pin counts. The Clawhammer will have 754 pins, and the Sledge Hammer will have 940 pins (more HyperTransport connections). As noted in my above complaints, it was confirmed that Clawhammer will have only a single 64-bit memory channel, which means that peak bandwidth to memory will be no higher than this year's expected 333/166MHz Thoroughbred platform, although latency to memory should still be dramatically improved. Of course, Sledge will support 126-bit connection to PC2700 memory (5.33GB/s from cpu to DRAM!).

So it looks like we'll have to buy the $$$ Sledgehammer if we want dual channel DDR with AMD's next-generation platform...
 
According to this article at Silicon Strategies...

Analysts believe the next-generation "Prescott" P4 (on .09um process) will ship some time between April and June of next year, presumably with clockspeeds starting at or near 4.0GHz.
 


<< So it looks like we'll have to buy the $$$ Sledgehammer if we want dual channel DDR with AMD's next-generation platform... >>

What I don't understand is what people are referring to when they say "dual channel." I guess since the dual channel feature must be supported by chipsets (like nForce and i850), Hammer has actually integrated the dual channel interface, which is why it is now impossible for chipset makers to provide anything but chipsets that can support nothing more than single channel, since ClawHammer has integrated much of the traditional NorthBridge and has therefore taken complete control of the situation.

Until I get to mess around with a ClawHammer I won't know for sure.

Btw, why does jc mean when he says:

...this year's expected 333/166MHz Thoroughbred platform...

333MHz FSB Athlon XP's?
 
> What I don't understand is what people are referring to when they say "dual channel."
> I guess since the dual channel feature must be supported by chipsets (like nForce and i850),
> Hammer has actually integrated the dual channel interface, which is why it is now impossible
> for chipset makers to provide anything but chipsets that can support nothing more than
> single channel, since ClawHammer has integrated much of the traditional NorthBridge and
> has therefore taken complete control of the situation.

That's correct...with Clawhammer, the memory controller is on die. With the way its been described, it doesn't look like there is no way to use a memory controller on a chipset. Thus you are limited to what you get with the processor. The advantage of the on-die controller should be substantially improved latency.

> ...this year's expected 333/166MHz Thoroughbred platform...
> 333MHz FSB Athlon XP's?

JC Hardware is a pro-Athlon site. They've been fancying the prospect of a 166FSB with Barton by the end of the year (they use Barton/Thoroughbred interchangably). Of course, as came out this week, AMD is reconsidering the release of Barton. AMD officials indicated that Barton would take production capacity away from Clawhammer, and thus won't pursue that product unless necessary.
 
No no, I realize the memory controller is on the Hammer die itself. What I was wondering is how the dual channel interface is configured in a Hammer system compared to any conventional dual channel system today (i850 and nForce).
 
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