The "effective area" is difficult to relate to the inclusion of finfets because it is an "effective" or "equivalence" metric. It includes the BEOL (wires) as well as stuff leaking in and around the transistors combined with the substrate leakage. The way to think of the "B" term is that it represents a value that comes from a weighted summation over all the leakage elements present in the IC, billions of them. The same with the activation energy and the field-enhancement leakage, the values extracted from the data are just average values derived from the ensemble of billion of leakage points in the IC, each with their own activation energy and field enhancement effect, so what we are basically looking at is where the average values of the system has changed to. The leakier components are going to dominate the parameters unless the weighting for them is very small. I'm thinking the reduction in both activation barrier and field-effect leakage is a one-time offset that occurred because of the transition to finfet, meaning I'd expect Intel's 14nm to have essentially identical activation barrier (same dielectric materials) but higher field effect leakage (narrower dielectric spaces between the wires).