Originally posted by: carlosd
...Until intel kill netburst whithin a while HT has no future.
Untrue. While the first wave of Intel's Next-Generation Microarchitecture (Merom/Conroe/Woodcrest) will not have SMT, the later cores will.
http://www.theregister.co.uk/2005/08/23/intel_next_gen_architecture/
"Interestingly, in its "first implementation", NGMA doesn't have HyperThreading, to make software easier to compile, David Perlmutter, VP and General Manager of Intel's Mobility Group suggested. However, expect cores supporting up to eight threads over time, Intel's Digital Enterprise Group VP, Stephen Smith, said. At that time, some CPUs will be single-threaded, others multi-threaded, he added."
Originally posted by: carlosd
Netburst uneficcient architecture fault, AMD64 CPUs doesn't need SMT to easily surpass those numbers. With shorter pipelines the level of improvement would be negligible using x86 architectures, if HT is so easy to implement in short pipelines desings with little core increase intel would Have implemente HT in pentium M CPUs and next dothan CPUs, but no they didn't reason: it's not worth it.
One: it is a myth that SMT is not worth it on shorter pipelines or single cores. The Alpha EV8 would have implemented 4-way simultaneous multithreading in a single core with a 9-stage pipeline. They estimated it would have doubled performance with a die-size increase of less than 10%.
http://www.realworldtech.com/page.cfm?ArticleID=RWT122600000000&p=5
"Research to date suggests SMT can approximately double the throughput performance of an 8 instruction-issue wide processor like EV8 for a cost in extra processor complexity equivalent to less than 10% increased die area for the processor core."
Two: Proliferations of the Merom core *will* have SMT. It probably will not double the performance, but I know for a fact it will increase it significantly.
Originally posted by: carlosd
Consifering that netburts is such an unefficient desing and considering the huge amount of power XEON consumes (not fault of HT) the improvements of HT of 15-25% are not amazing, besides those get ass kicked by opterons.
Compared to -20% to 10% performance increase moving to 64-bit on the same applications I listed before, I'd say 15-25% is quite a significant win. And that's on top of any gains multi-core can give you.
Originally posted by: carlosd
Originally posted by: dmens
1) "Not worth it". WRONG. 5% die area increase for >30% averaged wall clock gain on server workloads.
Using Netburst unefficcient architechture, AMD opterons CPUs without HT surpass those numbers with no need of SMT single core useless technology.
Well, if AMD thought as you, I think Intel has nothing to fear for the next 3 years. You remind me of the people that claim register renaming helps register-starved CISC designs more than RISC, and so is a necessary added cost of designing CISC chips. Well, the fact is, any serious high-performance RISC design also implements register renaming, because the performance gain is worth it.
Originally posted by: carlosd
Originally posted by: dmens
2) "Useless". WRONG. With the introduction of multicore, workloads will move to become even more threaded, and SMT will benefit.
Multicore >>>> HT, HT alone will not have much more to offer, multicore will increase the perfromance with increasing of cores and threads, look how useless is HT in the PD 840XE it does anything for the performance and sometimes even harm the performance, the situation won't change in the near future.
You could say the exact same thing about x86-64. In many cases, it bloats code and data sizes, decreasing cache effectiveness and slowing things down. Many benchmarks run slower in Windows x64 than 32-bit Windows XP. And the Linux applications I run (especially the lattice siever) are sensitive to codesize bloat, and actually run significantly faster in 32-bit mode.