How will Intel keep its process tech lead in the future?

[Arachnotronic]

32-nm from Intel is marginal to 40-nm from TSMC.

Bobcat > Saltwell

Same CPU performance/Bobcat outclasses Saltwell up to 6x in graphic performance.
Sure 18W TDP vs 6.5W TDP but you have to point out Bobcat is up to 6x faster in graphics.

Jaguar vs Silvermont appears to be even less pretty for Intel. Since, they are going to be late to the game with 22-nm Atom like they were with 32-nm Atom.

Cedar Trail-M: 65-72 mm² die size
Bobcat: 74-78 mm² die size

Someone here is confused about process technology versus micro-architecture.

 

[Idontcare]

Lithography is making up an an even greater % of the cost as the wafer size increases (due to the field size remaining constant, resulting in an increase in exposure time as the wafer area increases.)

That is an excellent article. Honestly it deserves its own thread.

The economics of lithography has always been the rate limiting step for the shrink rate of each node. I got started with the 500nm (0.5um) node and it was the case then as it is now.

Even with 0.5um, when you built your fab you had to vibration isolate the steppers by building special steel pillars that were not connected to the fab itself, the pillars went to bedrock and floated unconnected to the rest of the fab shell.

The expense of just preparing the fab for the litho equipment was a dominant cost factor in building the fab shell, let alone the cost of the litho equipment.

The problem though is as CTho9305 mentioned in the other thread. 450mm is a cost-reduction enabler, not a performance/scaling enabler. 450mm does not make your xtors any faster, it does not make the leakage any less, it does not decrease your center-to-edge non-uniformity's, etc.

At best it makes your current CPU cost less to manufacture. So Intel's expense goes from $35 per CPU to $25 per CPU. But your CPU is still going to cost you $300, and it isn't going to clock any faster or run any cooler.

And that is the problem with litho, litho doesn't make anything run faster or cooler. It shrinks it so it costs less to produce and that is all litho does for you.

To make the chips run faster, use less power, perform better, you need the rest of the materials science to come to bear. You need the design engineers to design cleverer circuits, you need the process engineers to design better functioning transistors and better conducting wires, etc.

None of that is addressed by billion dollar EUV tools or 450mm wafers. But the industry does not live by cutting costs, it lives by selling chips to consumers. And those consumers have no need to buy a chip just because it is cheaper to manufacture. Consumers will only buy the chip if it is faster or uses less power.

So EUV and 450mm are sexy topics for journals and articles, but the blue smoke that needs to be injected into 11nm chips to make them sellable and desirable has little to do with either of those topics.

 

[cbn]

The problem though is as CTho9305 mentioned in the other thread. 450mm is a cost-reduction enabler, not a performance/scaling enabler. 450mm does not make your xtors any faster, it does not make the leakage any less, it does not decrease your center-to-edge non-uniformity's, etc.

At best it makes your current CPU cost less to manufacture. So Intel's expense goes from $35 per CPU to $25 per CPU. But your CPU is still going to cost you $300, and it isn't going to clock any faster or run any cooler.

And that is the problem with litho, litho doesn't make anything run faster or cooler. It shrinks it so it costs less to produce and that is all litho does for you.

To make the chips run faster, use less power, perform better, you need the rest of the materials science to come to bear. You need the design engineers to design cleverer circuits, you need the process engineers to design better functioning transistors and better conducting wires, etc.

None of that is addressed by billion dollar EUV tools or 450mm wafers. But the industry does not live by cutting costs, it lives by selling chips to consumers. And those consumers have no need to buy a chip just because it is cheaper to manufacture. Consumers will only buy the chip if it is faster or uses less power.

So EUV and 450mm are sexy topics for journals and articles, but the blue smoke that needs to be injected into 11nm chips to make them sellable and desirable has little to do with either of those topics.

Great post!!

From what I have read EUV has been dissappointingly late, but I am thinking your post provides some insight into the reason why this could be happening.

If most of Intel's profits come from the result of design and process tech (ie, the performance scaling) then why would the company want to allocate as many resources to litho? (ie, cost-reduction enabler)

I guess it depends on how much each chip sells for? And How much each chip costs to make?

At the moment it appears Intel is not so worried about being burdened with high litho costs. (In a relative sense). My reasoning, at this time, is that their process and design engineers are more than making up for this.

 

[Idontcare]

At the moment it appears Intel is not so worried about being burdened with high litho costs. (In a relative sense). My reasoning, at this time, is that their process and design engineers are more than making up for this.

Intel has the added advantage of being at the forefront of computational lithography when it comes to putting theory into practice.

However they don't share this internal pioneering work in forging ahead with the industry of computational litho, much as they don't with their pioneering work in proprietary CMP and tungesten fill processes over the past decade.

So it helps them but no one else, exactly as you'd expect from an "only the paranoid survive" company

I'm also a bit curious as to the specifics of their contract with ASML when it comes to the 450mm litho deal they just signed. Ordinarily when you enter into a JDP (joint development project) between IDM and tool vendor there will be an exclusive sales-window of say 6 or 9 months in which no other IDM may purchase the equipment from the tool vendor.

 

[cbn]

I'm also a bit curious as to the specifics of their contract with ASML when it comes to the 450mm litho deal they just signed. Ordinarily when you enter into a JDP (joint development project) between IDM and tool vendor there will be an exclusive sales-window of say 6 or 9 months in which no other IDM may purchase the equipment from the tool vendor.

http://newsroom.intel.com/community...tion-semiconductor-manufacturing-technologies

Intel will then hold a total of 15 percent of ASML's issued shares. The total equity investment will be €2.5 billion (approximately $3.1 billion). As part of these agreements, Intel is also committing to advanced purchase orders for 450-mm and EUV development and production tools from ASML.

I couldn't find any specifics about exclusivity in the above Intel Press release. I did find info (bolded) pertaining to advanced purchase orders, though.

Another article I found here (from Reuters) mentions Intel does not have exclusive access.

Under the agreement, Intel gains no exclusive rights to future ASML products. But Freedman said Intel, as the sector leader, stands to gain if the overall industry benefits.

"I was a little surprised that ASML did not offer exclusivity or preferential access," Freedman said. But "if in fact they're lowering the cost of technology in emerging markets, you're opening markets as well."

The pact also involves advance orders of next-generation ASML chipmaking gear, strengthening the Dutch firm's assurance to move ahead in developing the technology.

 

[cbn]

With regard to those advanced purchase orders, I just have to wonder how that will work out....

If Intel's need is high enough...then maybe the EUV scanners will be "exclusive" (for a limited time) in a practical sense....even if they are not "exclusive" in a technical or legal sense.

Which brings up the question of what does Intel's "need" actually translate to. (eg, How many scanners would each future Intel Fab 10nm? module accommodate vs. ASML's ability to produce them?)

 

[Idontcare]

With regard to those advanced purchase orders, I just have to wonder how that will work out....

If Intel's need is high enough...then maybe the EUV scanners will be "exclusive" (for a limited time) in a practical sense....even if they are not "exclusive" in a technical or legal sense.

Which brings up the question of what does Intel's "need" actually translate to. (eg, How many scanners would each future Intel Fab 10nm? module accommodate vs. ASML's ability to produce them?)

It is clever Intel maneuvering, they are legend in this respect.

So what they have done is made sure "people" know the deal is structured to be non-exclusive in a legal/technical aspect (no DOJ issues for anti-competitive practices) but they ensured they basically get an exclusive access time-window by buying up all the volume of systems that ASML is going to be able to pump out for a while.

This way they don't need ASML to sign a contract that says ASML must limit orders to Intel for the first six months, instead they just create that in effect by creating a huge backlog of pre-ordered litho tools which prevents another IDM from taking delivery of a tool from ASML for months and months.

Touché, Intel, touché. DOJ can't touch them for this because it is technically not an exclusivity agreement, rather it is simple supply-limited market economics at work

 

[Lonbjerg]

It is clever Intel maneuvering, they are legend in this respect.

So what they have done is made sure "people" know the deal is structured to be non-exclusive in a legal/technical aspect (no DOJ issues for anti-competitive practices) but they ensured they basically get an exclusive access time-window by buying up all the volume of systems that ASML is going to be able to pump out for a while.

This way they don't need ASML to sign a contract that says ASML must limit orders to Intel for the first six months, instead they just create that in effect by creating a huge backlog of pre-ordered litho tools which prevents another IDM from taking delivery of a tool from ASML for months and months.

Touché, Intel, touché. DOJ can't touch them for this because it is technically not an exclusivity agreement, rather it is simple supply-limited market economics at work

The Intel of today does indeed look very fit to fight for the future...their are covering all their bases...so to say.

 

[cbn]

Nvm.

 

[cbn]

http://www.eetimes.com/electronics-...s-with-Intel-to-develop-450-mm-wafer-steppers

Report: Nikon to work with Intel to develop 450-mm wafer steppers
Junko Yoshida
8/7/2012 4:18 PM EDT

NEW YORK -- The Nikkei Shimbun, Japan’s economic newspaper, reported that Nikon Corp., the world’s number two stepper manufacturer, is going to work with Intel Corp. to develop the next generation semiconductor manufacturing equipment capable of handling 450-mm wafers.

The report said that Nikon plans to commercialize it by 2018.

How much financial support Intel will provide to Nikon is unclear. The Japanese newspaper reported that Intel “has apparently decided to shoulder tens of billions of yen in development costs for Nikon.”

Chuck Mulloy, a spokesman for Intel, said the company is not commenting on the Nikkei report at this time.

Earlier in July, Intel agreed to acquire a 15 percent stake in ASML Holding NV as part of a $4.1 billion deal to accelerate the development of extreme ultraviolet (EUV) lithography and technology needed for the looming transition to 450-mm wafers.

The $4.1 billion includes about $2.1 billion in equity investment in ASML, good for 10 percent of ASML's shares, Intel said. The company said it also committed to buy another 5 percent of ASML's shares for about $1 billion in the relatively near future.

Earlier this week, foundry giant Taiwan Semiconductor Manufacturing Co. Ltd. announced it would take a 5 percent stake in ASML as part of a similar arrangement.

 

[cbn]

Intel has the added advantage of being at the forefront of computational lithography when it comes to putting theory into practice.

However they don't share this internal pioneering work in forging ahead with the industry of computational litho, much as they don't with their pioneering work in proprietary CMP and tungesten fill processes over the past decade.

So it helps them but no one else, exactly as you'd expect from an "only the paranoid survive" company

Thanks! That is some good information!

The following is from an old article (August 2007), However, I think it does a good job getting the basic idea accross to folks not familiar with this topic) http://www.electroiq.com/articles/s...s-computational-lithography-capabilities.html

a demonstration of the way Intel's technology advances the chipmaker's own electronics manufacturing – showing how "computational lithography," which leverages the Moore's law improvement in computation to facilitate manufacturing innovations that maintain Moore's law, will be the backbone of Intel's proprietary DFM strategy for the foreseeable future.

the desired chip pattern is inverted mathematically using Maxwell's equations to define the photomask geometry that best projects that image. Going beyond optical proximity correction (OPC) and design rules, Intel's modeling technology allows chips to be built using equipment that is nominally one generation behind. That, in turn, lowers costs and accelerates progress by permitting the use of existing tools. In the case of critical layers for 45nm logic, the use of dry lithography instead of immersion lithography at 193nm lowered costs by 27%, according to Borodovsky.

While Intel did not find it necessary adopt pixelated mask technology for 65nm or 45nm, and does not expect it to be needed for 32nm, Borodovsky commented that it remains an option for 22nm if more mainstream technologies (such as EUV and double patterning) experience delays. And both Borodovsky and Singh asserted that computational lithography will be the backbone of Intel's proprietary DFM strategy for the foreseeable future.

(For other Anandtech Forum readers wanting to learn more) I found the wikipedia link on computational lithography to be pretty good too. --> http://en.wikipedia.org/wiki/Computational_lithography

 

[cbn]

http://spectrum.ieee.org/images/sep03/images/semif2.pdf

A great PDF image above (dated 2003) from Spectrum.ieee.org showing the effect of Optical proximity correction (a type of computational lithography). I really wish I could post the actual image so folks wouldn't have to click on the link....it really its quite good!! (and a picture is worth a 1000 words)

Optical proximity correction uses computational methods to counteract the effects of diffraction-related blurring and under-exposure by modifying on-mask geometries.

 

[Idontcare]

Here ya go