Guess it's up to me to say something 🙂
In general, when coming out of the hardware reset sequence, a processor starts fetching code from a certain fixed location. Chipset and board design must make sure that the bootstrap ROM is found there.
Talking IA32, we have processors that start execution at (top of address space)-10h, with current 32-bit machines the needle goes onto the record at FFFF_FFF0h. The chipset south bridge maps the BIOS ROM to occupy that spot, so off we go. First thing that BIOS does (after JUMPing to the location in the BIOS ROM where the bootblock code is, typically in the uppermost 16 KBytes) is fire up the keyboard controller to lift the dreaded A20 gate, and then detect and initialize the DRAM array. After that, life is much easier - next step is checksumming and unpacking the main BIOS POST code into DRAM, to then pass control to it. POST then initializes PCI, AGP and ISA busses, scans for devices there, allocates resources, fires up the boot input and output devices (this is when we see the VGA card fire up), and scans for supported peripherals (mouse, IDE, USB). Finally other mass storage support ROMs are invoked (IDE RAID, SCSI, network boot), and out we go into the boot sequence - loading the master boot record from the 1st of the listed boot devices, and passing control to it. After that, it's up to the installed operating system.
Questions?
regards, Peter