• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

host-pci ; pci-pci; tranparent-pci-pci bridges ....

P

popo

Member
Hi all,

Can someone please explain to me the role of and differences of:

PCI-ISA bridge
host-pci bridge
PCI-PCI bridge
transparent PCI-PCI bridge

Cheers

- Alex
 
Er, where do we start? You should have figured out the obvious purpose of these bridges ... if so, what exactly is the question? Or are you searching for a generic lecture on modern PC architecture?
 
Hi there,

What I'm wanting to know is what role do they play ?
e.g. what is a PCI-PCI bridge ? Why do we need it ? what purpose does it serve ?
e.g. what is meant by a "transparent PCI-PCI bridge ?"

An overview of the reasons for these bridges and the differences between them.

Cheers

- Alex
 
Ah. Now that's a question 😉

PCI-to-PCI bridges are needed for a handful of reasons. Some obvious ones:

* You can only have this many electrical loads on one bus, and you can make the traces only this long. If you want more devices and/or longer traces, you'll need a bridge chip.
* Any given PCI slot lets you connect just ONE device. If you want to make a multifunction card, you need to put a PCI-PCI bridge into that one device position, to create your own PCI bus on-card and run your multiple devices on that one.
* If you want to have different technology busses in the same system, PCI-PCI bridges isolate the properties. E.g. if you want to have PCI-X slots as well as plain 33 MHz PCI slots, you'll need a bridge to attach the slower slots to the faster bus without kicking the fast bus back into slow mode.

"Transparent"? That means that after the system's BIOS is done setting up the bridge architecture, device enumeration and usage are implemented without ever touching any programming feature of the bridge chips. Once they're set up, configuration and actual use traffic travels through these bridges automagically. Device drivers do not need to have any knowledge about how to get to "their" chip, they can completely ignore the fact whether their device is on a bridged bus or on a native one.
 
PCI host bridges. This is where the PCI system starts, the root of the tree of PCI busses you can then extend with PCI-PCI bridges. Also, their other end talks to at least one CPU (hence the "host" moniker).

PCI-ISA bridges: That's obvious, innit? From somewhere close to the root PCI bus, you bridge over to the remains of the ISA bus, where still much of the x86 compatibility hardware is being implemented. Basically any cycle not actively taken ("positively decoded" says the PCI specification) by a PCI device or bridge ends up being forwarded to ISA. There, the cycle either is served by a legacy device, or times out and yields no data.
 
😎

Hi all. I will now summarise for those searching the archives.
Thanks to Peter for his help.

host-pci bridge
-----------------

* Found on the north bridge [is the north bridge]
* serves the purpose to bridge the CPU to one or more PCI busses
* The root of the PCI system starts at the 'host-pci' bridge
* talks to at least one CPU, hence the word 'host'
* you can extend the host-pci bridge with a pci-pci bridge
* contains a virtual pci-pci bridge that represents AGP
* devices connecting to the north and south bridges show up as one pci bus (bus 0).

pci-pci bridge
----------------

* you can only have a certain number of electrical loads on one bus
and you can make the traces only a limited length. If you want more
devices and/or longer traces you will need a bridge chip.

* Any given pci slot lets you only connect just ONE device. If you
want to create a 'multifunction card' [e.g. DEC21151 chip found on
various four port NICs] you need to put a pci-pci bridge into that
one device position which will create a new separate "on-card" pci
bus which multiple devices can then connect to.

* if we want to have different technology busses in the same system we
can bridge the different 'isolated' busses together with a pci-pci
bridge e.g. pci-x slots as well as traditional 33MHz pci slots i.e. we
bridge the slower slots to the faster slots via a pci-pci bridge.

transparent pci bridge
--------------------------

After the system's BIOS is done setting up the bridge architecture,
device enumeration and usage are implemented without ever touching any
programming feature of the bridge chips.

Once the bridges [pci-pci,host-pci,pci-isa] are set up, configuration
and actual traffic is now able to travel through these bridges
automagically.

Device drivers do not need to have any knowledge about how and when to
get to "their" chip. They can actually ignore the fact of whether or
not their device is on a bridged bus or a native bus.

pci-isa bridge
----------------

From somewhere close to the root of the pci bus you bridge over to the
remains of the ISA bus, where still much of the x86 compatability
hardware is being implemented. Basically any cycle not actively taken
(positively decoded) by a pci device or bridge ends up being forwarded
to the ISA bus. There the cycle is either served by a legacy device or
times out and yields no data.
 
You must log in or register to reply here.

TRENDING THREADS

Back
Top