Has Intel stayed on schedule?

[Hulk]

In 2006 Intel presented it's new tick-tock plan where they would release a new process one year and a new architecture the next.

So have they kept their word?
If you were competing with Intel would their track record since 2006 make you think they were vulnerable or a very, very tough competitor?

(dates rounded to nearest month)

August 2006 > Conroe - 65nm 4-wide superscaler processor, ability to power down parts of the core when not being used, better out-of-order branch prediction, shared L2 among between cores, better prefetch, memory disambiguation, ability to process 128-bit SSE operands in one cycle, SSE4. Conroe returned the performance crown to Intel.

16 months later

November 2008 > Penryn - 45nm Hafnium+Metal process, mobile C6 deep sleep state for mobile parts, twice as fast Radix 16 divider, larger L2 (3MB/core), split load cache enhancement, higher bus speeds, 128-bit super shuffle engine to improve SSE performance, new SSE 4 instructions for multi-media, better virtualization (ring-deprivileging).

10 months later

November 2008 > Nehalem - Quad core in one die, Power control unit to power down cores, macro-op fusion enhancement, improved loop stream detector, 128 uops in flight, new cache structure L1/L2 per core, shared L3, 2nd level branch predictor, renamed return stack buffer (prevent stack corruption), return of hyperthreading, one die memory controller, 128-bit wide SSE 4.1 and new SSE 4.2.

13 months

January 2010 > Westmere - 32nm process with on package graphics, memory controller moved to GPU (worse memory performance), 1st 6 core in one die parts (Gulftown), gated uncore, 1.35V memory support, AES-NI, 1GB page sizes, better virtualization, HD Graphics.

12 months

January 2011 > Sandy Bridge - System Agent power control for PCIe, DMI, memory controller.., new branch predictor, addition of physical register file, better turbo, ring bus, micro-op cache, multiplier o/c on "K" parts, AVX extensions, Add with Carry throughput doubled, integrated graphics moved to CPU die, faster graphics (12 EUs up from 10 in Westmere).

14 months

May 2013 > Ivy Bridge - 22nm Tri-Gate Transistors, DDR3 power gating, lower system agent voltages, more accurate voltage characterization, power aware interrupt routing, configurable TDP, dynamically partitioned internal structures for better single threaded performance, prefetcher improvement, floating point/integer improvement, MOV operation improvement, digital random number generator, supervisory mode for execution protection, better integrated graphics (16 EU's) PCI express 3.0 and native USB 3.0.

13 months (predicted)

June 2013 > Haswell - Power optimizer for fine grain power control and new S0ix sleep states, decoupled L3 cache (like Nehalem), improved branch predictor, wider execution engine (increase from 6 to 8 ports), 2x cache bandwidth, improved memory controller, AVX 2 instructions, TSX, virtualization improvements, much faster graphics?

 

[Homeles]

13 months per generation on average... that's pretty damn close to a year.

 

[ShintaiDK]

I would say yes.

 

[tweakboy]

Either way there is no Haswell in 2013 that will beat a Ivy E 6 core chip OCed to 5Ghz

In 2014 then Haswell 6 core for enthusiast comes... gl

 

[Charles Kozierok]

Considering what they are developing, how close they've come to hitting their targets is not merely impressive -- it's astonishing.

In terms of how they rate compared to the competition -- can you name any chip company that has done as well, much less better?

 

[pantsaregood]

The "ticks" are going to slow down. We'll be moving to 14nm soon, and silicon atoms have a diameter of something like 0.22nm. Transistors are getting absurdly small, and that makes shrinking difficult.

 

[AtenRa]

January 2010 > Westmere - 32nm process

12 months

January 2011 > Sandy Bridge - 32nm process

15 months

April 2013 > Ivy Bridge - 22nm Tri-Gate Transistors,

14 months (predicted)

June 2013 > Haswell - 22nm Tri-Gate Transistors

 

[frozentundra123456]

13 months per generation on average... that's pretty damn close to a year.

The schedule is fine, no one could expect keeping perfectly to schedule. The thing I am more dissatisfied with is the lack of CPU performance improvement after Sandy, based on the very small improvement to Ivy and the modest improvement predicted for Haswell, which is a "tock".

 

[Hulk]

January 2010 > Westmere - 32nm process

12 months

January 2011 > Sandy Bridge - 32nm process

15 months

April 2013 > Ivy Bridge - 22nm Tri-Gate Transistors,

14 months (predicted)

June 2013 > Haswell - 22nm Tri-Gate Transistors

Ivy was late April so I rounded it to May.

 

[AustinInDallas]

The schedule is fine, no one could expect keeping perfectly to schedule. The thing I am more dissatisfied with is the lack of CPU performance improvement after Sandy, based on the very small improvement to Ivy and the modest improvement predicted for Haswell, which is a "tock".

Agreed, but Intel is so far ahead of AMD (at least in sales most would agree), that speed isn't there top priority and custom builders aren't either.

By decreasing power(wattage) and increase onboard graphics, they are working on the future, which will be more and more mobile, and less desktop

 

[Hulk]

The schedule is fine, no one could expect keeping perfectly to schedule. The thing I am more dissatisfied with is the lack of CPU performance improvement after Sandy, based on the very small improvement to Ivy and the modest improvement predicted for Haswell, which is a "tock".

That's why I listed the major changes. It's one thing to keep the schedule but did (are) they doing enough each generation?

I would think it's hard to have significant performance improvements when frequency has pretty much stalled and you are using the same basic 4 wide front end. Seems like they would have to go 5 or 6 wide at the front to show some major IPC improvements. But are the current process shrinks going to give them enough die space?

Let's see

Conroe is 143mm^2 and 291M transistors (dual core)
Penryn is 107mm^2 and 410M transistors (dual core)
Nehalem is 296mm^2 and 774M transistors (Lynnfield quad)
Westmere is 81mm^2 and 383M transistors (dual)
Sandy Bridge is 149mm^2/624M (dual) and 216mm^2/1.16B (quad)
Ivy Bridge is 118mm^2/? transistors (dual) and 160mm^2/1.4B (quad)

So in general Intel is increasing transistor count and decreasing die size with each generation. Then can balance increasing performance (more transistors and larger die) or increasing profit (less transistors and smaller die).

Perhaps at 5% IPC they are calculating on giving the consumer "just enough" performance gains while still getting more chips off of each wafer? Of course more transistors could mean more power but we don't know about that because at the same clock it could also be more efficient. We don't really have two designs at the same process for such a comparison. P4 vs. Conroe is hardly fare due to the caveman design of the P4.

 

[Piroko]

In terms of how they rate compared to the competition -- can you name any chip company that has done as well, much less better?

Well, several companies actually. Don't forget that they were struggling to increase revenue up until 2009:
http://anysilicon.com/top-10-semiconductor-companies-leaders-growth-and-winners/
Qualcomm also had a fantastic year 2012 with close to 30% growth while everyone else (except Broadcom) was either stable or losing revenue.

Intel has done well and is the big gorilla, but they are not uncontested. Especially Qualcomm has moved up in the food chain.

 

[Homeles]

The schedule is fine, no one could expect keeping perfectly to schedule. The thing I am more dissatisfied with is the lack of CPU performance improvement after Sandy, based on the very small improvement to Ivy and the modest improvement predicted for Haswell, which is a "tock".

This is largely a result of a few things, including increased focus on the IGP, and higher emphasis on lowering power consumption. The IGP is going to eat up transistor budget and thermal headroom, while lowering power consumption is obviously something that is difficult to do while simultaneously improving performance. The fact that they're lowering one while improving the other is a pretty big deal.

So you may be unhappy with lowered performance increases, but it's a result of their philosophical change. What you really have a problem with is their pursuit of lowering power consumption -- that, or you're living in a different world, where increased performance doesn't come at the expense of power and heat.

Well, several companies actually. Don't forget that they were struggling to increase revenue up until 2009:
http://anysilicon.com/top-10-semiconductor-companies-leaders-growth-and-winners/
Qualcomm also had a fantastic year 2012 with close to 30% growth while everyone else (except Broadcom) was either stable or losing revenue.

Intel has done well and is the big gorilla, but they are not uncontested. Especially Qualcomm has moved up in the food chain.

Intel's issue is one of market share and saturation. They almost completely dominate the server and notebook industries, so there isn't much room for them to expand. This is why they are diversifying -- their growth is bound by how well they can compete with them self, and are bound by a market that isn't really growing. This masks the progress they are making -- it's not really their fault that their market isn't growing, given that consumer demand has shifted to smartphones and tablets.

Qualcomm is benefiting from a burgeoning market. A rising tide lifts all boats. That is not to say that Qualcomm is not accomplishing something -- their growth, along with Samsung and Nvidia, has pretty much killed of TI's focus on the smartphone SoC market. They have the best ARM processor design in the industry. But it is really the consumers that are responsible for Qualcomm's growth.

To me, the link that you've provided speaks more of Intel making the biggest accomplishment.

That's why I listed the major changes. It's one thing to keep the schedule but did (are) they doing enough each generation?

I would think it's hard to have significant performance improvements when frequency has pretty much stalled and you are using the same basic 4 wide front end. Seems like they would have to go 5 or 6 wide at the front to show some major IPC improvements. But are the current process shrinks going to give them enough die space?

Let's see

Conroe is 143mm^2 and 291M transistors (dual core)
Penryn is 107mm^2 and 410M transistors (dual core)
Nehalem is 296mm^2 and 774M transistors (Lynnfield quad)
Westmere is 81mm^2 and 383M transistors (dual)
Sandy Bridge is 149mm^2/624M (dual) and 216mm^2/1.16B (quad)
Ivy Bridge is 118mm^2/? transistors (dual) and 160mm^2/1.4B (quad)

So in general Intel is increasing transistor count and decreasing die size with each generation. Then can balance increasing performance (more transistors and larger die) or increasing profit (less transistors and smaller die).

Perhaps at 5% IPC they are calculating on giving the consumer "just enough" performance gains while still getting more chips off of each wafer? Of course more transistors could mean more power but we don't know about that because at the same clock it could also be more efficient. We don't really have two designs at the same process for such a comparison. P4 vs. Conroe is hardly fare due to the caveman design of the P4.

What you've listed is why I subscribe to what I'd call the "floodgate" or "headroom" theory. As you show, Intel's emphasis on cutting costs leaves more gas in the tank for when they are eventually forced to play their best hand. So while the processors we see today may not be hugely improving over the performance of their predecessors, there is enormous room for improvement that could be unleashed if necessary. Intel's absolutely making progress, but it is one with cost and margins. If the tables were to turn, there is huge potential for the flood gains to open and bring massive performance gain.

A lot of people misinterpret this as Intel being lazy. They are absolutely not being lazy -- they are just making progress in areas that are not as visible to consumers (cost being a chief area).

 

[Exophase]

Perhaps at 5% IPC they are calculating on giving the consumer "just enough" performance gains while still getting more chips off of each wafer? Of course more transistors could mean more power but we don't know about that because at the same clock it could also be more efficient. We don't really have two designs at the same process for such a comparison. P4 vs. Conroe is hardly fare due to the caveman design of the P4.

Intel doesn't have an IPC knob that they're holding back. There's a limited amount of parallelism you can extract from an instruction stream while keeping within real world latency restraints. Intel's improvements have been increasingly more sophisticated for increasingly less benefit. That's the nature of progress in this area. Haswell changes quite a bit for quite little reward.

The only big restriction is that Intel is committed to only changing the design in ways that improve perf/W. Since the cores tend to be power limited to begin with that isn't really saying much different from only wanting to improve peak perf, except that it's held back by their TDP requirements.

 

[Piroko]

Intel's issue is one of market share and saturation. ... it's not really their fault that their market isn't growing, given that consumer demand has shifted to smartphones and tablets.

That's true, but for a while they had no straight line at where to diversify - and that can send your company down the Facebook way. Or destroy 265 billion $, the Apple way :ninja:

Qualcomm is benefiting from a burgeoning market. A rising tide lifts all boats. That is not to say that Qualcomm is not accomplishing something -- their growth, along with Samsung and Nvidia, has pretty much killed of TI's focus on the smartphone SoC market. They have the best ARM processor design in the industry. But it is really the consumers that are responsible for Qualcomm's growth.

That's why I mentioned 2012 as well though, Qualcomm is raking in market share even during a growth plateau. And at 13 billion $ revenue they went from just another semiconductor company to quarter the size of Intel in 3 years. I can't tell if it's a sustainable market share, but they made a lot of right decisions in the last years.

 

[Homeles]

I thought that the smartphone industry was still growing in 2012?

 

[Piroko]

http://www.zdnet.com/chip-industry-revenues-will-fall-in-2012-says-gartner-7000008897/
Smartphone shipments have definitely gone up, yes. It's a bit hard to read between the lines of Gartners analysis if the drop in revenues had an effect on smartphone revenues/margins as well, I would expect it though.

 

[frozentundra123456]

This is largely a result of a few things, including increased focus on the IGP, and higher emphasis on lowering power consumption. The IGP is going to eat up transistor budget and thermal headroom, while lowering power consumption is obviously something that is difficult to do while simultaneously improving performance. The fact that they're lowering one while improving the other is a pretty big deal.

So you may be unhappy with lowered performance increases, but it's a result of their philosophical change. What you really have a problem with is their pursuit of lowering power consumption -- that, or you're living in a different world, where increased performance doesn't come at the expense of power and heat.

Intel's issue is one of market share and saturation. They almost completely dominate the server and notebook industries, so there isn't much room for them to expand. This is why they are diversifying -- their growth is bound by how well they can compete with them self, and are bound by a market that isn't really growing. This masks the progress they are making -- it's not really their fault that their market isn't growing, given that consumer demand has shifted to smartphones and tablets.

Qualcomm is benefiting from a burgeoning market. A rising tide lifts all boats. That is not to say that Qualcomm is not accomplishing something -- their growth, along with Samsung and Nvidia, has pretty much killed of TI's focus on the smartphone SoC market. They have the best ARM processor design in the industry. But it is really the consumers that are responsible for Qualcomm's growth.

To me, the link that you've provided speaks more of Intel making the biggest accomplishment.

What you've listed is why I subscribe to what I'd call the "floodgate" or "headroom" theory. As you show, Intel's emphasis on cutting costs leaves more gas in the tank for when they are eventually forced to play their best hand. So while the processors we see today may not be hugely improving over the performance of their predecessors, there is enormous room for improvement that could be unleashed if necessary. Intel's absolutely making progress, but it is one with cost and margins. If the tables were to turn, there is huge potential for the flood gains to open and bring massive performance gain.

A lot of people misinterpret this as Intel being lazy. They are absolutely not being lazy -- they are just making progress in areas that are not as visible to consumers (cost being a chief area).

I will only address the power/performance issue. Basically they have not improved either by a great amount even with the 22nm shrink of Ivy, which was supposed to be the big gain.

From sandy to ivy there was a 5% max overall performance gain, and maybe at most a 20% reduction in power consumption. Haswell brings another 10% max, probably less overall, performance increase, and the TDP actually went up, although it is hard to evaluate that since more things are integrated onto the die. Seems like every new generation since Sandy has disappointed, basically, although Sandy was so far ahead of the competition that they still are leading, but the lead is shrinking. The only thing improving dramatically is the igp, and personally for the desktop I dont give a rat's butt about that.

 

[Homeles]

"From sandy to ivy there was" ... " maybe at most a 20% reduction in power consumption."

That's pretty much in line with typical node advancements. It's a bit on the low side, given that there was more done with Ivy Bridge than simply shrinking things, but Intel's ticks are more for economic/cost advantages.

 

[Idontcare]

I will only address the power/performance issue. Basically they have not improved either by a great amount even with the 22nm shrink of Ivy, which was supposed to be the big gain.

From sandy to ivy there was a 5% max overall performance gain, and maybe at most a 20% reduction in power consumption. Haswell brings another 10% max, probably less overall, performance increase, and the TDP actually went up, although it is hard to evaluate that since more things are integrated onto the die. Seems like every new generation since Sandy has disappointed, basically, although Sandy was so far ahead of the competition that they still are leading, but the lead is shrinking. The only thing improving dramatically is the igp, and personally for the desktop I dont give a rat's butt about that.

Not that I am in disagreement with the spirit of your post, but 22nm IB did better than 20% over 32nm SB in terms of power consumption, excepting for the corner case of >4.5GHz clockspeeds (well above the intended max clocks for either 32nm or 22nm).

The TDP for IB decreased from 95W @32nm to 77W @22nm for a good reason, the power savings really were there to make it happen.

I think what made 22nm seem so "meh" to us enthusiasts is that 32nm SB was just so awesome. 5GHz clocks on a HKMG process that even now GloFo only wishes they had. It makes for a tough act to follow.

 

[Hulk]

Intel doesn't have an IPC knob that they're holding back. There's a limited amount of parallelism you can extract from an instruction stream while keeping within real world latency restraints. Intel's improvements have been increasingly more sophisticated for increasingly less benefit. That's the nature of progress in this area. Haswell changes quite a bit for quite little reward.

The only big restriction is that Intel is committed to only changing the design in ways that improve perf/W. Since the cores tend to be power limited to begin with that isn't really saying much different from only wanting to improve peak perf, except that it's held back by their TDP requirements.

I'm not so convinced that x86 is "tapped out" as far as increasing IPC goes. Even when you consider efficiency. It appears that Intel is very calculating in giving the consumer just enough performance from generation-to-generation so it couldn't be called "flat" performance-wise, with only power efficiency improvements.

They simply have no competition in the >10W arena. Which is why they are scrambling to reach ARM-like TDP with their mainstream architectures. If they are not developing ARM I have a feeling they know exactly when they will reach TDP for tablets and phones. If I was pressed to make a prediction I think Haswell will work in tablets pretty well and Broadwell will open the x86 floodgates in tablets and begin to penetrate phones.

As for price as Anand wrote Intel HAS to keep production at full capacity in it's fabs to "subsidize" it's enterprise sales. If it has to "go cheap" to move chips for phones and tablets it has the pockets to do that.

When Intel and ARM converge power-wise there is going to be an implosion!

Can't wait.

 

[Ketchup]

Honestly, I am very impressed with what Intel is doing. I remember back when I started buying AMD chips because they were faster and cheaper, even though they were a less well-known name.

Then came the tick-tock, and I could not find a good reason to not switch over. Now, we are looking at the prospect of tick-tock dying down. Still present, but maybe not to degree we were seeing at the onset.

And where is AMD? Fading into the distance, at least in the ways that matter (performance, power draw, etc.)

Coincidence? I think NOT.

I am still thankful for AMD though. If it wasn't for them we'd probably still have some iteration of the P4.

 

[ehume]

I have three machines running Lynnfields. I take it the Lynnfields are Nehalems with on-die memory controllers that make them run hotter than the latter, but dispensing with the northbridge was useful. So where did Lynnfields (i7 860's, etc.) fit into the tick-tock model?

 

[Homeles]

They fall under Nehalem, the tock. They actually have an IMC -- the difference is that they have on-die PCI-E, one less channel of memory, and lack QPI.

 

[Exophase]

I'm not so convinced that x86 is "tapped out" as far as increasing IPC goes. Even when you consider efficiency. It appears that Intel is very calculating in giving the consumer just enough performance from generation-to-generation so it couldn't be called "flat" performance-wise, with only power efficiency improvements.

No, it isn't flat or tapped out, it's just increasing less and less for more and more effort as I've indicated. The low hanging fruit has been picked.

The improvements in IPC for legacy code have been decreasing less and less pretty much every uarch generation since x86 began, if you ignore the anomalous Netburst CPUs and stick to the progression from Pentium 3 to Pentium M to Core to Core 2. It's just hard to notice because clock speed has increased a lot during that time, but has stopped due to hitting the power wall.