Hammer!

[WilsonTung]

On the front page!

I'm tired and only skimmed it - but I have a few concerns.

(1)

<< AMD has indicated to us that single processor desktop Hammer systems will support a maximum of 2 unbuffered DIMMs >>

- Call me old fashioned, but I like to have at least 3 DIMM or 4 RIMM slots for upgradability purposes... I can see OEMs being cheap and sticking 2x 128 MB DDR in the boards.

(2)

<< AMD has hinted very strongly that the replacement for a DDR based DCT would be a DDR-II based solution in later versions of Hammer based processors. >>

- With the memory controller on the chip, I guess a whole new chip and mobo will be necessary if DDR-II proves to be a sucess.

(3) Die size - I wonder how much extra space integrating the memory controller and HT will take.

 

[Mookow]

I'm praying the key word in that phrase "Hammer systems will support a maximum of 2 unbuffered DIMMs " is unbuffered. Crucial isnt selling registered non-ECC sticks of 256 PC2100, but the ECC registered sticks are $7 more than the non-ECC unbuffered.
*crosses fingers*

 

[Athlon4all]

I just finished reading it. Great article Anand!

 

[Soccerman]

one thing worries me about this architecture for desktop computers..

well first of all, I think it would be silly to continue to have the AGP controller seperate from the southbridge if that's all that the AGP controller is (and no longer a Northbridge like we think of them today)..

but what about when the AGP card, or the PCI cards request RAM usage? I mean, it's stupid on performance when the AGP card has to resort to anything off the card itself in the first place (which is one reason why consoles are at an advantage, but that was discussed on another thread).

is the fact that the CPU is the memory controller a good thing when these cards request RAM and CPU time?

great article Anand! I appreciate the info very much! I just hope that memory technology that AMD needs to fulfill the memory requirements of this chip will be there (DDR II? we don't yet know it's capabilities).

 

[Scootin159]

Does the CPU actually sit between the RAM & HT bus?

If so is DMA possible?