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HALT Command Detect (Why disabled by default ?)

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But Peter, if it were so simple why wouldnt the AMD technicians just point to the document you guided me to ? It is public information, they made a big isssue from this just on the way they answered me. Besides I am running a TBird with a 7.5 multiplier and HLT detect enabled 2 months allready on my K7T266 PRO and not a single lock, neither any kind of problem that I noticed.

Gustavo.-
 
I wonder if it's not a stepping specific problem (stepping, or whatever term AMD uses to describe silicon revisions). Meaning, Gustavo, that you might have a stepping in which this errata is fixed and that is why you don't see the problem, but other steppings would have it. If it does cause instability/crashes in some CPU's it makes sense to disable it completely. After all, HLT is not a feature that most people care about outside of portable applications.

As far as the NDA stuff, at most high-tech companies, it is better not to comment at all on a problem than to say too much. You don't get fired for saying "I can't say." but the reverse where you say something that you shouldn't can often lead to negative management attention. So you end up in situations where information has been publicly released by one arm of the company while the other arm is saying "we can't say, please sign an NDA". The larger the company, the more common this problem is.
 
pm:

The second part of your post seems reasonable, it makes sense and could be the answer to my previous question.

As to the first part, I cheked the stepping of my cpu against those declared having the errata and it is on the list (dont remember now the stepping name).

Thanks Gustavo.-
 
I've been running a 1.4 GHz Athlon-C with the HALT detect and such enabled for a few months now and my machine runs quite stably. I guess my Abit KG7-RAID's CPU voltage regulator is up to par. 🙂 I too saw around 15C difference in idle CPU temperature when running with the "software cooling" solution; my idle temp is very close to my case temperature. Like pm said, it may have been a certain stepping that had a problem. I'm not sure which stepping mine is, but it seems to work fine.
 
Something that hasn't been focused on that is probably at the root of many halt problems:

I wrote in an earlier thread that a modern processor, from a power supply perspective, is "The load from hell". If a processor is in a halt state and suddenly begins to run near full speed, it produces a step current demand of ~40 amps in a FEW NANOSECONDS. The processor switches from a near open circuit to a load of .03 ohms in nanoseconds! While all this is happening, the voltage is SUPPOSED to be a steady ~1.5 volts. Sure. No way.

Being able to keep the internal processor voltage to within even +-25% seems to me a daunting challenge.

Two approaches I see:

Design the processor to start and stop more softly, ramping speed up and down over MICRO-seconds. ( a thousand times less abrupt than normal)
Integrate a special multi-layer ceramic cap in the processor instead of the few individual discrete caps that are on the processors now.

Maybe some of the proprietary info circulating relates to this. But, it is just engineering, ohm's law and reactance.
 
highwire:

Sounds reasonable too, but Intel processors do support HLT pretty well, so this could be one of the reasons of the price diffreneces between AMD and Intel processors ?

Also tçyour approach is almost opposite to pm´s one.

Gustavo.-
 
I owned the ASUS A7V133 (VIA KT 133A) and run a TBird-C @ 1208 MHz (ASUS still calls this 1200 :frown ) running at around 50°C with a Silverado at full speed. I have changed now to the (in-)famous ECS K7S5A, with a CPU temp down to about 35°C, using same CPU and cooler (always running Win2000 Prof).

Since the multiplier here is 9.0 I can't comment on erratum #14. HLT obviously wasn't enabled on the ASUS one, so I inquired there about this fact. The only answer I got in those days from ASUS (can't find it anymore) was that this was due to 'stability problems'.

On the ECS board obviously this feature is enabled, since I didn't do anything about it. I wonder if some motherboard manufacturers excempted themselves form AMD's 'advice'.

BTW, does anyone have knowledge of the chipset registers documentation for the SiS 735 for WPCREDIT?
 
Crassus: I got an e-mail I cant find now from MSI, where they replyed me when I asked why not to enable HLT detect saying AMI and AWARD were requested by AMD to disable HLT detect so I guess that mobo manufacturers buy semi-programmed bios codes and they just do minor changes, not including that bit that is disabled from AMI and AWARD allready.

Peter can confirm this as he is a BIOS programmer ....

Thanks Gustavo.-
 
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