Global Foundries 32nm Process Status

[Martimus]

I asked someone inside the industry to tell me what was going on with Global Foundries 32nm process. He had previously told me that they were having issues with packaging, so I checked with him to see where they currently were (whether they fixed the problem).

What he told me was rather interesting. GF was unable to fix their packaging issues, so they opted to change their integration scheme and limit the usage of the low-k dielectric material to just one metal level (and falling back to using the 45nm low-k dielectric for the other metal levels).

This means, unfortunately, the resultant products are going to consume a bit more power and clock a bit slower than their customers were told to expect.

It also means the new 32nm integration is now going through the reliability testing that the old integration scheme started some 6 months ago, which is why the whole train has been delayed by as many months.

He said that he expects Global Foundries to part ways with the IBM alliance once the New York fab is equipped with the enough tools to create the initial pilot line (circa beginning 16nm development with EUV toolset.) He believed this because IBM's direction is to use gate-first HKMG which will underperform the competing foundry integration schemes.

I realize there is another thread that addresses this main topic, but it has gotten so far off topic that I felt it was best to just post this information in a new thread.

 

[LoneNinja]

+1 to making a new thread, that other one is a mess. This just doesn't sound like very good news.

 

[Phynaz]

Translation: This shit hard

 

[aigomorla]

IDC where are you?

IDC usually fixes all the stuff we dont know about FAB's and litho's.

Actually im kinda missing CTho9305 also... havent seen him in ages.
He used to be a good counter to IDC and Ruby.

 

[IntelUser2000]

+1 to making a new thread, that other one is a mess. This just doesn't sound like very good news.

Probably why IDC doesn't wanna answer.

 

[bryanW1995]

bulldozer, RIP. we hardly knew ye'.

seriously, this sucks. it doesn't suck from an "oh noes, I will be stuck with another crappy cpu" standpoint, but rather because intel really could push their anti-overclocking agenda much more easily now and generally charge lots of $$ for not much more performance in the future. I think that if amd can't make bulldozer work well then it will be very difficult for them to pull out of this hole, and also very difficult for our community to continue getting great performance out of cheap(er) hardware. /rant

 

[aigomorla]

bulldozer, RIP. we hardly knew ye'.

seriously, this sucks. it doesn't suck from an "oh noes, I will be stuck with another crappy cpu" standpoint, but rather because intel really could push their anti-overclocking agenda much more easily now and generally charge lots of $$ for not much more performance in the future. I think that if amd can't make bulldozer work well then it will be very difficult for them to pull out of this hole, and also very difficult for our community to continue getting great performance out of cheap(er) hardware. /rant

time for all of us to start suping up netboxes!

woot!

so who has the fastest netbox?

 

[IntelUser2000]

What he told me was rather interesting. GF was unable to fix their packaging issues with gate-first HKMG, so they opted to change their integration scheme and limit the usage of the high-k dielectric material to just one metal level (and falling back to using the 45nm low-k dielectric for the other metal levels).

This means, unfortunately, the resultant products are going to consume a bit more power and clock a bit slower than their customers were told to expect.

That doesn't make sense. The "other metal layers" are interconnect layers. You need Low-K on the interconnect layers and High-K on the transistor dielectric.

 

[bryanW1995]

time for all of us to start suping up netboxes!

woot!

so who has the fastest netbox?

no kidding, I actually checked out my iphone the other day and thought "how much faster will this thing be if I overclock it?". In the future we will be overclocking our toasters so that they make toast in 48 seconds instead of 59. hmmmm...

 

[richierich1212]

shit.

 

[cbn]

time for all of us to start suping up netboxes!

woot!

so who has the fastest netbox?

That is a really good point.

How much current would a 4GHz quad core draw if it was built on a 32nm process (ie, Sandy Bridge).

Mini-ITX finally catching up with uATX for people not worried about encoding? (or using their GPU to do encoding)

 

[Idontcare]

That doesn't make sense. The "other metal layers" are interconnect layers. You need Low-K on the interconnect layers and High-K on the transistor dielectric.

I'd venture to say the OP meant to say low-k (it all makes sense then) but got their wires crossed in translation in referencing HK.

 

[IntelUser2000]

Lol, that's quite a big change. But yea it makes sense now.

 

[DrMrLordX]

Hmm. I wonder how this squares with Bulldozer allegedly being on track? And just how much slower is a bit slower going to be?

 

[heyheybooboo]

I'm may be going way out on a limb here, but I wonder if all this 'talk' about GF/32nm is more about supposition and innuendo than fact.

....
He said that he expects Global Foundries to part ways with the IBM alliance once the New York fab is equipped with the enough tools to create the initial pilot line (circa beginning 16nm development with EUV toolset.) He believed this because IBM's direction is to use gate-first HKMG which will underperform the competing foundry integration schemes.
....

Not sure what this means because the 'common platform' alliance has pumped their 32/28nm collaboration considerably over the past month (one example), but maybe I need my coffee this AM?

16nm development is far, far from mainstream manufacturing and a blanket "underperform competing foundry integration schemes" for 'gate-first' seems a little like FUD or 'spin' to me. Even with my limited understanding and knowledge, what I have seen about 16nm the Hk/Ge gate stack was demonstrated with 'gate-first' design (don't think it was from IBM, though).

GF has a July update on HkMG on their web site. Without going into process details, the 'people that know' are not talking specifics.

We don't know if the initial process will be a gate-first “Hybrid” stack that incorporates some type of scalable metal layers integrated with low-k, and if it really matters anyway in first spins. Once again, the 'people that know' are not talking and to suggest 'under-performance' with 'competing foundry integration' ??

It's almost LOL. What competing foundry integration? Intel HkMG at 32nm? That would make that statement self-serving at best. It sure as heck doesn't look to be TSMC whose ramp at 40nm has been 'meh' at best, with the outlook for 32/28nm being unquestionably uncertain.

We'll find out soon enough, and I suspect whatever initially rolls from GF at 32nm will improve efficiency and performance, and the 'internet engineers' can begin the debate on whether 'first is first' or 'last is first'





--

 

[ModestGamer]

Hmm. I wonder how this squares with Bulldozer allegedly being on track? And just how much slower is a bit slower going to be?

everybody focus's on raw clock speed. I am interested in isntr executions per clock. 2 chips at the same clock speed can perform dramatically different.

 

[bryanW1995]

well, remember that barcelona took a LONG time to get over 2.5 ghz. bulldozer could be 50% faster clock/clock over SB but still get spanked if SB clocks 70% higher.

 

[heyheybooboo]

well, remember that barcelona took a LONG time to get over 2.5 ghz. bulldozer could be 50% faster clock/clock over SB but still get spanked if SB clocks 70% higher.

In the interest of keeping this thread on track we are trying to focus on process technology and gating.

The issue (my synopsis) is whether GloFo can drive up yields at 32nm, and:

1) fully develop gate-first tech; and/or
2) 'hybrid' gating technology with a combination of low-k and gate-first HkMG.


It was 'anticipated' the retail market throw-down would begin in Q4/10 but the issue has become the ramping of GF 32nm process, what it entails with potential delays, and how this may be a setback in the gate-first design. Hopefully we can keep this thread on track.

With limited exceptions the next level of microprocessors will equally utilize the AVX instruction set, 'stock' clock and 'turbo' between 3GHz to 4GHz, have dies which may incorporate a GPU core, and operate at a substantially reduced thermal envelop with a substantial increase in efficiency and IPC. The numbers being tossed around look impressive from either standpoint.



--

 

[ModestGamer]

well, remember that barcelona took a LONG time to get over 2.5 ghz. bulldozer could be 50% faster clock/clock over SB but still get spanked if SB clocks 70% higher.

I have feeling if they did bulldozer right. It might be 100% faster then sandy bridge clock for clock. but we shall see.

 

[IntelUser2000]

It's almost LOL. What competing foundry integration? Intel HkMG at 32nm? That would make that statement self-serving at best. It sure as heck doesn't look to be TSMC whose ramp at 40nm has been 'meh' at best, with the outlook for 32/28nm being unquestionably uncertain.

Intel doesn't have a foundry service though. The two main ones will be TSMC and Samsung.

 

[VirtualLarry]

Whatever happened to AMD's flash-memory business? Couldn't they concievably re-start that business? Does GF have enough spare production to run some flash wafers?

 

[Martimus]

That doesn't make sense. The "other metal layers" are interconnect layers. You need Low-K on the interconnect layers and High-K on the transistor dielectric.

Yeah, it was a typo (and misunderstanding) on my part. I fixed the original post to correct what was written.

This is also second hand knowledge, so if there are any specific questions I would have to go and ask the source, and come back - or someone familiar with what is going on could answer it as well.

 

[Martimus]

What competing foundry integration? Intel HkMG at 32nm? That would make that statement self-serving at best. It sure as heck doesn't look to be TSMC whose ramp at 40nm has been 'meh' at best, with the outlook for 32/28nm being unquestionably uncertain.

We'll find out soon enough, and I suspect whatever initially rolls from GF at 32nm will improve efficiency and performance, and the 'internet engineers' can begin the debate on whether 'first is first' or 'last is first'
--

It was just his opinion, although I believe that he was in fact referencing TSMC who I believe switched to gate-last HKMG about 6 months ago. It was definitely just conjecture, and not meant to come across as fact.

Also, it doesn't sound that bad, other than the 6 month delay. The 45nm low-k implementation was actually very good (at least in comparison to the issues we saw AMD have at 65nm.) It just means that 32nm won't be as much better than 45nm as originally planned.

I still have high hopes for what 2011 will bring us. These little tidbits of information are always interesting to me as well, which is why I wanted to share them.

 

[Idontcare]

Whatever happened to AMD's flash-memory business? Couldn't they concievably re-start that business? Does GF have enough spare production to run some flash wafers?

It was spun-off as a company called Spansion, which then went bankrupt a year ago (around the time that qimonda went bankrupt).

 

[DrMrLordX]

everybody focus's on raw clock speed. I am interested in isntr executions per clock. 2 chips at the same clock speed can perform dramatically different.

Oh, of course . . . K8 vs Netburst is a classic example of that. I'm more focused, first and foremost, on release date. The sooner a relatively blunder-free launch for Bulldozer occurs, the better for all of us.

That being said, I am also interested in knowing what a bit slower and a bit hotter entails. If it's, oh I don't know, 100-200 less mhz and maybe 10-15W of extra TDP at launch, then big deal; they can fix that in future steppings I'm sure.