gigabyte GA-K8NF-9 help (nforce4)

[gsparesa]

Originally posted by: rv8abuilder
In addition to changing timings, make sure you have the 2T command set to Disabled. With this set at auto, I had ~4900, but when I set it to disabled, it jumped up to ~5980.

If you assume that AUTO reads the SPD and the SPD doesn't contain the 1T or 2T wait states, then this makes sense. For some reason I though it did. CPU-Z version 1.24 doesn't even report it, that I can see.

 

[acer1]

In addition to changing timings, make sure you have the 2T command set to Disabled. With this set at auto, I had ~4900, but when I set it to disabled, it jumped up to ~5980.

It worked. My score jumped to ~5900 It also raised my cpu benchmark. That was exactly the answer I was looking for. thanks for the info rv8abuilder. I knew it had to be some little setting that was set wrong.

 

[gsparesa]

Originally posted by: acer1

In addition to changing timings, make sure you have the 2T command set to Disabled. With this set at auto, I had ~4900, but when I set it to disabled, it jumped up to ~5980.

It worked. My score jumped to ~5900 It also raised my cpu benchmark. That was exactly the answer I was looking for. thanks for the info rv8abuilder. I knew it had to be some little setting that was set wrong.

I'm glad it worked but...
The SPD data actually provides vital information to the system Bios to keep the system working in optimal condition with the memory DIMM.

Byte # 15
SDRAM Device Attr:
Min Clk Delay, Random COl Acess = 1 Clock

Byte 15
Minimum Clock Delay, Back-to-Back Random Column Access (tCCD min).
This is read off the tCCD min column of the DRAM data sheet and is in the unit of clock cycles. For the most case, it is 1 clock cycle.
1 clock cycle 01h 2 clock cycle 02h

The question is, "What is the system BIOS reading from the RAMS's SPD.?" Is your RAM's SPD byte 15 labeled witha tCCD of 2T or 1T? Maybe, Corsair value select uses the same memory chips as their more expensive stuff but just loads byte 15 of the SPD with 2T? (conspiracy theory here!) Maybe the system BIOS just reads a few thigs in the SPD? Maybe, I'm just full of crap again and I need glasses?

SPD Definitions Here

 

[pctennys]

Same thing worked for me.

What is that setting exactly? Now that I changed it, I wanted to know what I did! : )

 

[acer1]

Ya, I have no idea what I just changed, but everthing seems to be running fine.

 

[bloodline]

I'd also like to know what disabling the 2T does 🙂

 

[blinky2004]

Can't remember what the command rate option does but it is important for performance. I first remember seeing the option on my KT7A

With 4 Dimms you are stuck at 2T with current AMD64's (allegedly fixed in Revision E aka Venice).

Because the memory controller is in the CPU not the Northbridge, some mobo manufacturers will have followed AMD's guidelines for memory speeds (e.g. 333DDR / PC2700 Max for 4 Dimms) and some will have set their own based on their testing.

Most users can find they can run 4 Dimms @ 400 / PC3200.

I believe the JEDEC PC3200 standard is technically only for a 1 Dimm setup.