First dual-core PC's to ship on Monday, Intel says

[EndGame]

Originally posted by: AnandThenMan
Speculate all you want. But stating that, "Q1 2007 will begin the reign of Pentium 5" is not speculation but a statement of fact. Perhaps you are unclear of the difference.

OK, now go find exactly where I said that and quote it for me.......I'll be waiting......LOL!

Intel has no hope of doing a 4+ core Pentium at this point.

Now that's speculation! ;-)

 

[Keysplayr]

Originally posted by: AnandThenMan
LOL here we go again with wild speculation. The P5 will rule this and that blah blah in 2007. Good thing you can see into the future.

Is there something wrong with speculating? Or do you just not like what they are saying...
More than 80% ( I would speculate ) of all posts in this forum is speculation or at least morphs into a speculation circus. So what. Deal with it.

 

[PetNorth]

The question is that when someone lucubrates about something within two years (a lot in CPU architecture, even in this period may be projects cancellation, do you remember things named Tejas, Potomac?), something is bad, too bad right now, including for the near future.

 

[MBrown]

Originally posted by: Cooler
Are they even going to name it Pentium 5 that is redundant. I think they might start going with Pentium with model numbers .

I thought they were going to get rid of the Pentium name and call it something else.

 

[Cooler]

Its Brand name that everyone knows about it would be foolish to get a newname.

 

[EndGame]

Originally posted by: PetNorth
The question is that when someone lucubrates about something within two years (a lot in CPU architecture, even in this period may be projects cancellation, do you remember things named Tejas, Potomac?), something is bad, too bad right now, including for the near future.

True, but in that respect, the whole thread is speculation but, information from the manufacturers themselves is the nearest to the truth one can come at this point!

 

[ahock]

do you know when will intel use their laser silicon? this I think would be a beast

 

[pm]

Originally posted by: Sentential
In addition SOI doesnt control leakage. ALl SOI does is lace the copper interconnects between the various levels and help to act as a superconductor thus reducing vcore requirements. It does nto STOP leakage it just helps reduce the vcore.

SOI eliminates bulk leakage (nowadays the smallest of the three contributors of IC leakage), it reduces power by reducing the parasitic junction capacitance, it eliminates the "body effect", it has better radiation rejection, and, in addition, if you have the CAD software to take advantage of it, you can take advantage of a small speed-up effect. The price you pay for these benefits is increased wafer cost, decreased yield, cooling issues, and some increase in reliability issues. It has nothing to do with superconductors or copper interconnects - SOI is at the lowest layer of the chip... it's below even the transistors and it's a long way from the copper interconnects above the transistors.

The real issue for, or against, SOI is cost. The question is, is the cost in terms of yield and wafer cost worth the benefits, and it's a subject that has been vehemently debated at several conferences that I have been to. For IBM and AMD, the answer was yes. For pretty much the entire rest of the industry - TI, TSMC, UMC, and Intel, the answer is no. My take on it is, if you are shipping in smaller quantities and you have high margins, then SOI can make a convincing arguement. If you are shipping in larger quantities to lower margins, then SOI adds too much cost to make sense.

 

[Aisengard]

Everyone remember Intel's Tejas and 10Ghz claim from two years ago?

A lot can happen in two years. Probably every speculation right now is way off.

 

[ahock]

I've read an article regarding themanufacturong cost of x86 processor and most of AMD's processors are pretty expensive to build as compared to Intel. This is also the reason why Intel despite high temp on its prescott opted not using SOI because of cost.