E5-2600 v3 CMT and CAT - which SKUs?

petreza

Junior Member
Oct 7, 2014
6
0
66
I have a hard time finding out which particular processors (SKUs) of the E5-2600 v3 range support the Cache Monitoring (CMT) and Cache Allocation Technology (CAT) features.

On the 4th page of the Anandtech's review - the magic inside uncore , section "More improvements" near the bottom, it says
In certain SKUs is possible have control over the placement of data in the last-level cache.

Which SKUs?

Thanks!
 
Last edited:

petreza

Junior Member
Oct 7, 2014
6
0
66
"The CMT Is supported on all Xeon E5 v3 SKUs and is enumerated via CPUID."

http://www.tweaktown.com/articles/6...-server-family-processor-overview/index4.html

Thanks for the link, Burpo!
What I gathered from that review is:

1. All SKUs support Cache Monitoring (CMT) - your link above to page 4

2. As far as Cache Allocation Technology (CAT) - it is enabled only on 5 specific SKUs, optimized for communications - page 3:
Intel Cache Allocation Technology (CAT) enables control over the placement of data in the last-level cache, allowing you to isolate and contain misbehaving threads/apps/VMs, or prioritize more important ones. This feature is available on five specialized communications SKUs in the Xeon E5 v3 generation in a generation-specific way.
and more info about that is given on page 5 of the review.

3. The specific communications models are:
E5-
2603
2620
2640
2680
2695
v3
Intel also offers an additional SKU list; these are used for communications and storage servers. The E5-2680 v3, E5-2640 v3, E5-2620 v3, E5-2603 v3, and E5-2695 v3 are labeled as Comms/Storage straight-adopt server SKU, and have support for a long life under server usage model conditions.
from the bottom of page 2 of the review.
 

AnArchitect

Junior Member
Apr 23, 2015
1
0
0
I know this is an old thread, but just to update the info here since it still shows up in search results:

1. You're correct that CMT is supported on all Xeon E5/E7 v3 Processors

2. CAT is supported on the processors listed on this page, which is a different set of 5 than what was posted earlier in this thread:
http://www.intel.com/content/www/us...monitoring-cache-allocation-technologies.html

A new set of blogs describing CMT is also linked at the bottom of that page.