E Opterons out.

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LTC8K6

Lifer
Mar 10, 2004
28,520
1,576
126
Yeah, just going to 4 cpus would probably cause the new Xeons to stumble again against the Opterons.
 

Jeff7181

Lifer
Aug 21, 2002
18,368
11
81
Originally posted by: LTC8K6
Yeah, just going to 4 cpus would probably cause the new Xeons to stumble again against the Opterons.

At least until Intel makes either dual chipsets, or a chipset with dual memory controllers.
 

Amaroque

Platinum Member
Jan 2, 2005
2,178
0
0
Originally posted by: Jeff7181
Originally posted by: LTC8K6
Yeah, just going to 4 cpus would probably cause the new Xeons to stumble again against the Opterons.

At least until Intel makes either dual chipsets, or a chipset with dual memory controllers.

That's not likely to happen. With the Prescott problems, I would assume Intel is concentrating on a whole new core/chipset design.
 

ribbon13

Diamond Member
Feb 1, 2005
9,343
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0
I wonder how a Quad dual-core Opteron would fair against a Intel with it's limited memory bandwidth?
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,255
16,113
136
Originally posted by: ribbon13
I wonder how a Quad dual-core Opteron would fair against a Intel with it's limited memory bandwidth?
Can you say Obliterate ?
 

clarkey01

Diamond Member
Feb 4, 2004
3,419
1
0
Originally posted by: Jeff7181
Originally posted by: clarkey01
LTC8K6 would you elaborate on your thougts, I get the feeling your hinting that Xeons are faster then Opterons all around, and lol im not going to argue but would you add to that or back it up, hey,just for fun

Well as mentioned, the current Xeons are Prescott based. Because of the design, performance is extremely dependant on keeping the pipeline full, which lots of memory bandwidth helps to achieve. By memory, I don't just mean system RAM... I mean L2 cache, L1 cache, and actual registers. Too slow, or too little memory will create pipeline stalls that effect CPU's with long pipelines much more than CPU's with short pipelines. So increasing the number and to some extent, the size of registers (the fastest form of memory as far as the CPU is concerned) reduces the dependency on the L1 cache, and the L2 cache, and system RAM. So it makes sense that a design that is MORE dependant on these things to perform well will benefit more by improving these things... doesn't it?

Thats all great, why did you quote me ?
 

Avalon

Diamond Member
Jul 16, 2001
7,571
178
106
Originally posted by: clarkey01
Originally posted by: Jeff7181
Originally posted by: clarkey01
LTC8K6 would you elaborate on your thougts, I get the feeling your hinting that Xeons are faster then Opterons all around, and lol im not going to argue but would you add to that or back it up, hey,just for fun

Well as mentioned, the current Xeons are Prescott based. Because of the design, performance is extremely dependant on keeping the pipeline full, which lots of memory bandwidth helps to achieve. By memory, I don't just mean system RAM... I mean L2 cache, L1 cache, and actual registers. Too slow, or too little memory will create pipeline stalls that effect CPU's with long pipelines much more than CPU's with short pipelines. So increasing the number and to some extent, the size of registers (the fastest form of memory as far as the CPU is concerned) reduces the dependency on the L1 cache, and the L2 cache, and system RAM. So it makes sense that a design that is MORE dependant on these things to perform well will benefit more by improving these things... doesn't it?

Thats all great, why did you quote me ?

Because he was responding to you? :confused:
 

clarkey01

Diamond Member
Feb 4, 2004
3,419
1
0
Originally posted by: Avalon
Originally posted by: clarkey01
Originally posted by: Jeff7181
Originally posted by: clarkey01
LTC8K6 would you elaborate on your thougts, I get the feeling your hinting that Xeons are faster then Opterons all around, and lol im not going to argue but would you add to that or back it up, hey,just for fun

Well as mentioned, the current Xeons are Prescott based. Because of the design, performance is extremely dependant on keeping the pipeline full, which lots of memory bandwidth helps to achieve. By memory, I don't just mean system RAM... I mean L2 cache, L1 cache, and actual registers. Too slow, or too little memory will create pipeline stalls that effect CPU's with long pipelines much more than CPU's with short pipelines. So increasing the number and to some extent, the size of registers (the fastest form of memory as far as the CPU is concerned) reduces the dependency on the L1 cache, and the L2 cache, and system RAM. So it makes sense that a design that is MORE dependant on these things to perform well will benefit more by improving these things... doesn't it?

Thats all great, why did you quote me ?

Because he was responding to you? :confused:

Didnt asnwer my question
 

clarkey01

Diamond Member
Feb 4, 2004
3,419
1
0
My thought was that opteron was always the more rounded chip , from LTC8K6 post he hinted that the chip was now more dominant and therefore a better choice over opteron, I just ask if this was the case.
 

Jeff7181

Lifer
Aug 21, 2002
18,368
11
81
Originally posted by: clarkey01
Originally posted by: Avalon
Originally posted by: clarkey01
Originally posted by: Jeff7181
Originally posted by: clarkey01
LTC8K6 would you elaborate on your thougts, I get the feeling your hinting that Xeons are faster then Opterons all around, and lol im not going to argue but would you add to that or back it up, hey,just for fun

Well as mentioned, the current Xeons are Prescott based. Because of the design, performance is extremely dependant on keeping the pipeline full, which lots of memory bandwidth helps to achieve. By memory, I don't just mean system RAM... I mean L2 cache, L1 cache, and actual registers. Too slow, or too little memory will create pipeline stalls that effect CPU's with long pipelines much more than CPU's with short pipelines. So increasing the number and to some extent, the size of registers (the fastest form of memory as far as the CPU is concerned) reduces the dependency on the L1 cache, and the L2 cache, and system RAM. So it makes sense that a design that is MORE dependant on these things to perform well will benefit more by improving these things... doesn't it?

Thats all great, why did you quote me ?

Because he was responding to you? :confused:

Didnt asnwer my question

What question?
 

clarkey01

Diamond Member
Feb 4, 2004
3,419
1
0
Originally posted by: clarkey01
My thought was that opteron was always the more rounded chip , from LTC8K6 post he hinted that the chip was now more dominant and therefore a better choice over opteron, I just ask if this was the case.

That question
 

LTC8K6

Lifer
Mar 10, 2004
28,520
1,576
126
Clarkey01, all I have been asking for is an explanation of Anandtech's benchmarks where the new Xeon crushes the new Opteron in 2 out of the three benchmark sets.

I'll ask again, what happened? Before, as far as I know, there was no contest at all between Xeons and Opterons in any server benches. Opterons ruled without question.

Now there appears to be a question.

I suspected that it was memory bandwidth, so I said that more processors would make a difference. Meaning that the Opteron would win again if more than 2 cpus were used.

Jeff7181 flat out said it was the memory bandwidth, and I agreed that it probably was.

My original post asking about the Opteron's losses in Anandtech's benches and speculating that more CPU's would reverse the results:

How come the new Opteron is getting is ass kicked most of the time by the new Xeon?

I didn't think the extra cache and the faster bus could make such a difference.

I guess more than 2 CPU's might make a difference, though.

I said nothing at all about which chip is "better". Both chips are excellent, and I am glad we have choices or we'd be paying a lot more for CPU's. I am especially glad that Intel seems to be doing better, since I prefer that there be some competiton.

It's a shame when folks automatically assume there's been an attack on the object of their affection. Yes, that's directed at you, clarkey01.
 

Jeff7181

Lifer
Aug 21, 2002
18,368
11
81
Originally posted by: clarkey01
Originally posted by: clarkey01
My thought was that opteron was always the more rounded chip , from LTC8K6 post he hinted that the chip was now more dominant and therefore a better choice over opteron, I just ask if this was the case.

That question

You asked that "question" after I replied to you. Questions are normally followed by question marks too.
 

DAPUNISHER

Super Moderator CPU Forum Mod and Elite Member
Super Moderator
Aug 22, 2001
32,033
32,510
146
Couple questions for you tech doc lovers.

1. How do the new Xeon and Opteron compare in heat and power?

2. Is there potential for clock throttling with the Xeon under extended heavy load?
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,255
16,113
136
1) The new Xeon runs hotter and takes more power than the Opteron (I believe thats what I read)
2) Who knows. I didn;t see any comment about that in the 2 reviews I read.
 

VirtualLarry

No Lifer
Aug 25, 2001
56,587
10,225
126
Don't the new Xeons have some sort of improved hardware-prefetch logic in them? Could that explain the benchmark results, perhaps the actions of those benchmarks are a good fit to those sorts of improvements?
 

VirtualLarry

No Lifer
Aug 25, 2001
56,587
10,225
126
Originally posted by: Gamingphreek
However:
Link
Abit i guess thinks there is a difference between the two.
Also why would the boards make it any different... doesn't this have to do with the Memory Controller?
-Kevin
Yes, it more-or-less does, usually the memory controller has to be designed to support either/both (I think - I would assume that it would have to delay some of the timings by one clock-tick to deal with interfacing with the registers on the DIMM boards.)

It's kind of interesting how there is a dichotomy between "unbuffered" and "registered" memory, but there is no "buffered + registered", or just "buffered" DIMMs. However, there are motherboards that add their own buffers (not registers) to the memory control signals for the DRAM array. The Abit BX6-r2 was one such board; I owned one at one point. Abit added an additional set of "buffer chips" on the board, six chips in all, between the chipset's memory-controller and the DIMM slots, in order to stablize the signals to be able to load them down with four double-sided SDRAM DIMMs.

I think that it would generally not be cost-effective to add those buffers to the individual DIMMs, and since current SDR/DDR is based on syncronous memory control signals, registers are a more appropriate choice. Back in the days of EDO/FPM DRAM, I'm sure that there probably were "buffered" memory sticks intended for servers, although I've not really seen any myself.

Intel's "FB-DIMM" scheme is essentially some sort of cross between the two, I guess.
 

aka1nas

Diamond Member
Aug 30, 2001
4,335
1
0
Originally posted by: Gamingphreek
However:

Link

Abit i guess thinks there is a difference between the two.

Also why would the boards make it any different... doesn't this have to do with the Memory Controller?

-Kevin

What on that page makes you think that buffered and registered are different things. All I could see was that they said they supported "unbuffered, ECC, and registered" RAM modules. Its ECC and unbuffered that are not mutually exclusive to each other, not registered and unbuffered.
 

DAPUNISHER

Super Moderator CPU Forum Mod and Elite Member
Super Moderator
Aug 22, 2001
32,033
32,510
146
No one has a solid answer to my questions eh? Fine, I'll do my own research </lazy ass request> :p
 

PetNorth

Senior member
Dec 5, 2003
267
0
0
http://www.itjungle.com/breaking/bn021605-story02.html

Yahoo, for instance, has come back three times to buy Sun Fire V20z servers to support some of its workloads. Yahoo benchmarked those applications on Xeon-based systems using the 64-bit "Nocona" processors from Intel against the V20z servers, and found that it needed 660 Xeon servers to support the workload. The same workload could run on 460 Opteron servers and deliver the same performance, which is a significant savings in money. And each V20z server burned quite a bit less electricity and dissipated a bit less heat, so the heat profile of the Opteron solution was significantly lower than the Xeon solution. A similar benchmark by the University of Leicester in the United Kingdom required 750 Xeon servers to do the work of 500 Opteron servers, he said.
 

LTC8K6

Lifer
Mar 10, 2004
28,520
1,576
126
That article doesn't say whether the comparison was with the considerably faster 2MB L2 cache Noconas, though.

It probably wasn't, since they are just coming out.
 

DAPUNISHER

Super Moderator CPU Forum Mod and Elite Member
Super Moderator
Aug 22, 2001
32,033
32,510
146
Originally posted by: LTC8K6
That article doesn't say whether the comparison was with the considerably faster 2MB L2 cache Noconas, though.

It probably wasn't, since they are just coming out.
That makes sense. It seems doubtful the power&heat of the new Nocona is any better than the last, and that combined with the added expense of keeping the ambient room temp the same would make the cost of even the same number higher correct?

 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,255
16,113
136
Yes, I think its guaranteed from what we have seen with other P4 and Xeon changes, that the extra transistors for the extra 1 meg of cache does make it run hotter and use more power.
 

ribbon13

Diamond Member
Feb 1, 2005
9,343
0
0
By then, whats the point? Who cares if Intel is faster if you can get more done with AMD's with a lower power bill? Less power used, less heat generated, less air conditioning needed in the server room. :p