Duron is back or call it Applebred, now OFFICIAL

[Alkaline5]

Originally posted by: Macro2
The code name comes from a cross between the appaloosa and the thoroughbred.

 

[MadRat]

Seems pointless to offer a 64K size L2 cache. Its not like its a big change in die size to make it 128K. I wouldn't doubt if its designed with 128K of L2 cache with half of it disabled. Thats the recurring theme in chip design these days...

 

[ElFenix]

Originally posted by: MadRat
Seems pointless to offer a 64K size L2 cache. Its not like its a big change in die size to make it 128K. I wouldn't doubt if its designed with 128K of L2 cache with half of it disabled. Thats the recurring theme in chip design these days...

it cuts 11.2 mm^2 off the tbred design, by my calcs. that'd put it down to 73 mm^2, which is dead in the middle of amd's 50 to 100 mm^2 "sweet spot"

 

[gregor7777]

For 25 stinkin bucks I'll be first in line to upgrade my newly built mame box.