stevty2889
Diamond Member
- Dec 13, 2003
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They are still seperate die, just like smithfield, it's 2 cedar mill die slapped together in one package, so each chip only has 2mb of cache.
Originally posted by: stevty2889
They are still seperate die, just like smithfield, it's 2 cedar mill die slapped together in one package, so each chip only has 2mb of cache.
Originally posted by: Viditor
Originally posted by: stevty2889
I don't think they will cost much more. The cache is larger, but the die size is smaller due to the 65nm proccess, so it doesn't really cost more to produce the chips, other than the cost of the new proccess.
True, but remember that 1MB of cache is about 40-50% larger than the core...these will have a total of 4MB cache.
Originally posted by: Viditor
Originally posted by: Duvie
I always though cache was expenisve and added to heat...What a waste if this is the type of gains it got ....256 to 512 was big and even 512 to 1mb was nice...however 1mb to 2mb was anemic and the 2mb to 4mb seem like more unused potential...
I imagine there are some apps like superpi and other that may like this...the question is is this the same 6xx series cache??? You know the cache that was slower then the 5xx series cache with its increased latency...
Cache is VERY expensive (it adds more to the die size than the core by about 2 to 1), but doesn't necessarily add more heat...by adding cache, you may increase the aggregate heat, but you decrease the number of localized "hot spots" on the die.
One thing to note, the new Intel dual cores (900 series) will almost certainly be more expensive than their 800 series brethren...
Originally posted by: Furen
A few things to point out: 2.8GHz is the lowest a Prescott CPU can clock using a FSB speed of 200MHz (800 QDR) since its lowest multiplier is 14, this seems to be a limitation that is shared by cedarmill/presler, so they cannot lower the clock to less than 2.8ghz using speedstep. Intel's ultradense SRAM (as in cache) has a much higher latency penalty, but this is offset by the operating clockspeed (the latency is in clock cycles, after all). That is the reason why Pentium Ms do not use that high-density SRAM. These 65nm shrinks are a huge improvement over the 90nm parts (yes, huge) but, unfortunately, will not lead to much higher clock speeds, since current leakage seems to be pretty high anyway. 65nm parts will use less silicon, but that does not mean they will be cheaper to produce. Intel has to amortize its transition and R&D expenses on all the 65nm parts and still make a profit, which should make the price a bit higher than current 90nm chips.
Originally posted by: Furen
Sorry, sorry, I did not mean amortize. I meant that they will sell them for a premium in order to show short-term returns on a long-term investment. Chips on new processes normally have a premium, regardless of the fact that the new process will give them good return on investment over its lifetime simply because: a) it's easy to charge a premium on chips that are more efficient, faster and better, overall; and b) investors love seeing returns on investments, which, in turn, makes everyone (or rather everyone that matters to Intel's management) richer.
Now, this does not mean that they will actually be sold at a premium (since there are rumors that they wont) but they wont necessarily be cheaper as the fact that their dies will be smaller (much smaller, by the way, since the cache on Prescott2Ms is about 50% of the die size--to err on the side of caution--and these will ONLY get more cache, the rest of the die will remain the same) would suggest, which would lessen the price ramp-down that tech items normally have. AMD did do this when it went to 90nm... remember those super expensive winchesters? They were socket 939 but they were more expensive than comparable socket 754 newcastles, and their die size was much smaller (since AMD didnt add more cache, etc). Higher-than-normal margins on new process chips help offset any transitional, short-term expenses that may be incurred.
Originally posted by: Ready
126 watts idle? No thanks
Originally posted by: AkumaX
what's the dual core version of P-M called?
