Does the Hammer do floating point differently?

[zephyrprime]

I've read the the Hammer can use the SSE registers for regular (not SIMD) floating point operations, freeing mankind from the horror of the x87 floating point stack. Is this true? I've not been able to find any confirming data sources online.

 

[jna]

This is probably better in the "highly technical" section. I don;t think there are any hammer white papers floating around, but I could be wrong (obviously, microsoft and suse have one)

 

[imgod2u]

This is an interesting concept although I doubt it. Programs make direct calls to register addresses. If you change where data is stored, the program would still treat it as if it were in the x87 register stack. It'd still make numerous useless FXCH calls and only operate on the top of the stack.

 

[MadRat]

Is there a way to loopback to the next instruction when a pointless call (i.e. FXCH) in the code is made, thereby shaving off unecessay time wasted for a reload of the pipeline caused by the pointless call?

 

[imgod2u]

Not really neccessary with the Athlon design. It uses a barrel shift method that allows FXCH instructions to be executed without any (or at least, noticable) loss in performance. Although such an idea would help the P4 significantly.