does the "distance" in the cpu matter yet?

[TK2K]

hey, so i was thinking, does the distance electrons have to travel inside a cpu matter yet? like, in a 90nm vs a 65nm cpu you would assume there is less physical distance the electrons have to travel, correct?

the only reason i ask is on my x1900xt there are squiggly lines, and the only reason i could think of was so the electrons would reach the die at the same time as ones coming from other areas.


sorry if im way off track with this.

 

[imported_inspire]

I don't think we have the manufactuiring technology to engineer something like squiggly lines that make all the electrons reach the die at the same time. On the other question, I don't know anything about that.

 

[TK2K]

well i couldnt think of any OTHER possible reason to have them be like that....

 

[Born2bwire]

Originally posted by: inspire
I don't think we have the manufactuiring technology to engineer something like squiggly lines that make all the electrons reach the die at the same time. On the other question, I don't know anything about that.

Not exactly, they do engineer the lengths and the geometries with electromagnetics in mind. For timing purposes, they have to pay attention to long path lengths in regards to logic hazards and adjusting those is a tool that can be used. One of the big problems with going with smaller die size and higher frequencies is that one needs to take into account the EM effects more. In addition, for interconnects, it is not the electrons that we are moving around that we are interested in, it's the electromagnetic waves.

 

[Blazin Trav]

I would imagine 65nm would result in less distance traveled, since TDP on 65nm processors is lower.

 

[imported_inspire]

Originally posted by: Born2bwire

Originally posted by: inspire
I don't think we have the manufactuiring technology to engineer something like squiggly lines that make all the electrons reach the die at the same time. On the other question, I don't know anything about that.

Not exactly, they do engineer the lengths and the geometries with electromagnetics in mind. For timing purposes, they have to pay attention to long path lengths in regards to logic hazards and adjusting those is a tool that can be used. One of the big problems with going with smaller die size and higher frequencies is that one needs to take into account the EM effects more. In addition, for interconnects, it is not the electrons that we are moving around that we are interested in, it's the electromagnetic waves.

Okay, I'm not really physics saavy, so let me see if I got this right. The circuits are probably engineered 'wavy' to cut down the EMF interference? And, was I correct in saying that the man.tech. doesn't exist? Because if it did, that would imply that we could be extremely precise in the manufacturing of circuits and processors.

One more - now I see - the wavy is to adjust for impedance or noise in the circuit?

 

[Aluvus]

Originally posted by: inspire

Okay, I'm not really physics saavy, so let me see if I got this right. The circuits are probably engineered 'wavy' to cut down the EMF interference? And, was I correct in saying that the man.tech. doesn't exist? Because if it did, that would imply that we could be extremely precise in the manufacturing of circuits and processors.

One more - now I see - the wavy is to adjust for impedance or noise in the circuit?

The usual reason to fiddle with trace shapes in that way is so that they are the same electrical length. This means that two signals of the same frequency sent along the traces should take the same amount of time to arrive at the other end.

At high enough frequencies (or long enough lengths), it's possible to design the length of the traces to assist in particular types of termination or to control standing waves and other such behavior. I'm not in the mood to do the math and see what the wavelength range being dealt with (outside the CPU) is, and therefore whether those kinds of tricks are in play.

 

[imported_inspire]

Originally posted by: Aluvus
The usual reason to fiddle with trace shapes in that way is so that they are the same electrical length. This means that two signals of the same frequency sent along the traces should take the same amount of time to arrive at the other end.

At high enough frequencies (or long enough lengths), it's possible to design the length of the traces to assist in particular types of termination or to control standing waves and other such behavior. I'm not in the mood to do the math and see what the wavelength range being dealt with (outside the CPU) is, and therefore whether those kinds of tricks are in play.

So, you're saying that the manufacturing technology does exist to make circuits that have the same electrical length? That sounds like a very precise science - considering the speed of electron response in a circuit.

 

[Aluvus]

Originally posted by: inspire

Originally posted by: Aluvus
The usual reason to fiddle with trace shapes in that way is so that they are the same electrical length. This means that two signals of the same frequency sent along the traces should take the same amount of time to arrive at the other end.

At high enough frequencies (or long enough lengths), it's possible to design the length of the traces to assist in particular types of termination or to control standing waves and other such behavior. I'm not in the mood to do the math and see what the wavelength range being dealt with (outside the CPU) is, and therefore whether those kinds of tricks are in play.

So, you're saying that the manufacturing technology does exist to make circuits that have the same electrical length? That sounds like a very precise science - considering the speed of electron response in a circuit.

The concern is not electrons, but electromagnetic waves. Wave behavior is predictable and model-able; electron behavior isn't.

It can be high-precision stuff, depending on exactly what the design goal is. But then cramming 200 million + transistors into 200 sq. mm (Athlon 64 Toledo), where the dielectric of each transistor is 90 nm wide is pretty precise as well. And it looks like the processor in the OP's Radeon x1900XT is at 384 million transistors, again at 90 nm.

That stuff makes motherboard traces that can be measured in mils look downright gigantic.

 

[BrownTown]

Originally posted by: inspire

Originally posted by: Aluvus
The usual reason to fiddle with trace shapes in that way is so that they are the same electrical length. This means that two signals of the same frequency sent along the traces should take the same amount of time to arrive at the other end.

At high enough frequencies (or long enough lengths), it's possible to design the length of the traces to assist in particular types of termination or to control standing waves and other such behavior. I'm not in the mood to do the math and see what the wavelength range being dealt with (outside the CPU) is, and therefore whether those kinds of tricks are in play.

So, you're saying that the manufacturing technology does exist to make circuits that have the same electrical length? That sounds like a very precise science - considering the speed of electron response in a circuit.

Also, the thickness of the gate dielectirc in the 90nm node isn't 90nm, its 1.2nm...

Since when has making equal length wires been "very precise science", thats not even remotely difficult to do. And, yeah the point is so that all the connections have the same electrical properties so that the signals "arrive" at the same time.

 

[Born2bwire]

Okay, I'm not really physics saavy, so let me see if I got this right. The circuits are probably engineered 'wavy' to cut down the EMF interference? And, was I correct in saying that the man.tech. doesn't exist? Because if it did, that would imply that we could be extremely precise in the manufacturing of circuits and processors.

It's one of the considerations. Probably the most important is to control the electrical length to avoid timing hazards. Next would probably be interference and noise. The bending would allow them to increase the electrical length. However, the corners will create reflections, if you have a lot of bends back on itself the regular parallel traces will create additional inductance, and etc. These will create impedence mismatches and noise but these are not a prime consideration yet. Most of these considerations can be taken care of by premade tookits and applets or even just basic design heuristics (like mitering the corners or only allowing bends less than 60 degrees).

In addition, routing the traces by hand is rare for very complex boards and chips. There are just too many factors and lines to lay down. Nowadays, they can use applets and toolkits to follow specific guidelines while optimizing various parameters, like the amount of space used. They generally only take the time to hand route very critical stages or often used cells. So sometimes the haphazard appearence of traces can be the result of the autorouting algorithm.

 

[CTho9305]

hey, so i was thinking, does the distance electrons have to travel inside a cpu matter yet? like, in a 90nm vs a 65nm cpu you would assume there is less physical distance the electrons have to travel, correct?

Sort of. However, there are 2 factors affecting how fast signals can travel along wires: the length and the cross-sectional area - it's just like a water pipe. A narrower pipe of the same length won't let you move as much water through as fast as a wider one. When you go to a smaller process, the wires also get narrower. You can make them taller (so, instead of being a square, the cross section is a tall rectangle), but that has other disadvantages. If I remember correctly, you basically gain about as much as you lose, so the wire delay doesn't really change much. However, transistors get faster, so relative to transistors, wires get slower.

Now, you asked specifically about electrons. Electrons don't actually move very fast - this page explains drift velocity. Using some very rough numbers of 1mA current, 1 micron^2 wire, and their value for copper, I=n*A*v*Q so v = n*A*Q/I so v = (8.5*10^28)*(10^-12)*(1.6*10^-19)/(10^-3) gives an answer of 13.6m/s assuming I can do arithemtic. Obviously this is horribly slow, but as other people have mentioned, the electric field propagates a lot faster than electrons (AIUI, close to the speed of light). But, just to throw in yet another detail, signals on chips don't travel anywhere close to that speed (unfortunately!).

If signals moved across a chip at the speed of light, and we assume your chip is 1GHz (it makes the numbers easier ), light travels about a foot in a cycle, so getting signals across a 1 centimeter chip would be easy. A simple way to look at this is a trough of water - you make a ripple on one end, and it travels to the other end at the wave speed. On a chip, though, signals aren't sent just by getting the electric field (the ripple) from the signal's source to its receiver. Instead, the source puts a whole bunch of charge onto the wire, and charges it up along the entire length. Going back to the trough, it would be like filling and emptying the trough from one side, and the receiver doesn't see the change until the water's depth crosses the half way mark. If you imagine a real trough of water, you can pretty easily create ripples, but filling and emptying it would require you to move around gallons of water, which takes a while.

Just for reference, I think it takes something like 3-5 cycles to get a signal across a modern CPU.

 

[BrownTown]

I think you covered this, but just to make sure, the EM wave does travel at the speed of light, but in order to trigger the transistor you need some certain amount of charge to build up, and it takes time for that charge to build up, so you have to wait until enough potential builds up to be registered.

 

[imported_inspire]

Originally posted by: BrownTown

Originally posted by: inspire

Originally posted by: Aluvus
The usual reason to fiddle with trace shapes in that way is so that they are the same electrical length. This means that two signals of the same frequency sent along the traces should take the same amount of time to arrive at the other end.

At high enough frequencies (or long enough lengths), it's possible to design the length of the traces to assist in particular types of termination or to control standing waves and other such behavior. I'm not in the mood to do the math and see what the wavelength range being dealt with (outside the CPU) is, and therefore whether those kinds of tricks are in play.

So, you're saying that the manufacturing technology does exist to make circuits that have the same electrical length? That sounds like a very precise science - considering the speed of electron response in a circuit.

Also, the thickness of the gate dielectirc in the 90nm node isn't 90nm, its 1.2nm...

Since when has making equal length wires been "very precise science", thats not even remotely difficult to do. And, yeah the point is so that all the connections have the same electrical properties so that the signals "arrive" at the same time.

Considering the speed of the electrical current, and the short distance it is covering, I assumed that 'trimming' the distance of the wires would need to be very precise. For example, let's say the electric signal travel at half the speed of light - 150,000,000 m/s. Then, you take a circuit that is probably 1/1000 m long, and you had better be precise if you want the signals to arrive at the same time.

My assumptions may be off, and there may be a 'window' of time where the signals are pratically considered to arrive simultaneously, but I didn't think I was too far off.

When you say not even remotely difficult to do, I really don't know what you mean (tape measure and pliers?) - what would it take to do something like this?

 

[Aluvus]

Originally posted by: inspire

Considering the speed of the electrical current, and the short distance it is covering, I assumed that 'trimming' the distance of the wires would need to be very precise. For example, let's say the electric signal travel at half the speed of light - 150,000,000 m/s. Then, you take a circuit that is probably 1/1000 m long, and you had better be precise if you want the signals to arrive at the same time.

My assumptions may be off, and there may be a 'window' of time where the signals are pratically considered to arrive simultaneously, but I didn't think I was too far off.

When you say not even remotely difficult to do, I really don't know what you mean (tape measure and pliers?) - what would it take to do something like this?

1 mm? The traces that are "squiggly" are usually several cm long.

It's important to keep some things in mind.

Higher-frequency waves are more demanding when you want to keep timing together. But waves that are sent over longer distances are generally lower frequency. Your processor may operate at a few GHz, but the bus that connects it to other components is a fraction of that. Those lower frequencies give you a bigger fudge factor to work with. If you want signals to arrive at about the same time, that doesn't mean they arrive at exactly the same time, but close enough to it to satisfy the limits of whatever component they're being fed to. Different pulse shapes and encoding schemes can be used to make life easier, depending on exactly what you're doing and what the priorities are.

The boards used in these sorts of applications are largely designed by a piece of software, which then feeds its results to a machine whose tolerances are quite low. Traces on fairly basic boards can be made on what is essentially a CNC router, which are quite precise. They may also be chemically etched.

Bit-Tech has a lot of pictures of the motherboard manufacturing process.

None of this is to say that all of this business is dead easy. But with modern techniques and equipment, it's entirely doable. In the industry, it's routine.

 

[f95toli]

You are confusing signals and EM waves.
I don't know what the accuracy is but lets say it is 1 ns. Now, this number is not directly related to "how fast" the EM waves are traveling.
In digital logic you are transfering (nominally) square pulses, so the "1 ns" value refers to the point in time when the pulse reaches the logic threshold. I.e two pulses arrive "at the same time" if the voltages cross the threshold within this timeframe.
Hence, the fact that EM waves travel at the speed of light does not neccesarily mean that the SIGNALS travel at that speed as well.

 

[imported_inspire]

Originally posted by: f95toli
You are confusing signals and EM waves.
I don't know what the accuracy is but lets say it is 1 ns. Now, this number is not directly related to "how fast" the EM waves are traveling.
In digital logic you are transfering (nominally) square pulses, so the "1 ns" value refers to the point in time when the pulse reaches the logic threshold. I.e two pulses arrive "at the same time" if the voltages cross the threshold within this timeframe.
Hence, the fact that EM waves travel at the speed of light does not neccesarily mean that the SIGNALS travel at that speed as well.

Thanks for the response, Aluvus - I learned something cool.

Right - which is why I used half the speed of light in my example, although I admittedly don't know how fast an electrical signal (or pulse) moves. I may not have used the correct terminology, but I meant what you were saying. In fact, I don't remember saying anything about EM Waves....

 

[gsellis]

Don't forget that clock cycles are in the billions per second. Even though a small space, it is still travelling a distance over a short time.

There were already issues with output being delayed behind input starting in the 80's. They have just had to factor for the latency.

 

[icarus4586]

It's primarily the delays introduced by logic elements and flip-flops that engineers have to worry about. That's the main thing that restricts clock speed. However, signal routing is important. A 1GHz clock cycle has a period of 1 ns. In 1 ns, light travels 38 cm. A signal often travels through many logic elements, though. If you've got a CPU die that's 1 cm wide, it's easy to see how propagation delay could have an effect if logic elements are placed alternately at opposite sides of the CPU. Faster clock speeds and larger, more complex CPUs make the problem much more noticeable, often requiring flip flops to synchronize signals at the expense of a clock cycle of delay.

 

[pm]

When I designed the last stage of the clock route on the Itanium 2 9000-series microprocessor (codenamed Montecito), I had to make sure that the clock electrical signal routed over the entire 22mm x 28mm die had to arrive everywhere at the same time (+/-3ps, or +/-0.000000000003s). For this, I designed a tree which looked a bit like a fractal that I routed over the top of the chip. To make this work given the varying types of receiving circuits that I was driving, I relied on tapering (narrowing and widening the wires to adjust the delay) and, in some spots, wavy-squiggly lines.

I have presentation slides here (note, adobe acrobat): http://www.ewh.ieee.org/r5/denver/sscs/Presentations/2005.03.Mahoney.pdf

If you look at the die micrograph on page 3 of the presentation, zoom in a bit and look at the second gray block from the top-left corner closely, you can see the zig-zagging a bit as I tried to get the signals to meet our skew target.

Patrick Mahoney
Intel Corp.

 

[CTho9305]

I have presentation slides here (note, adobe acrobat): http://www.ewh.ieee.org/r5/denver/sscs/Presentations/2005.03.Mahoney.pdf

The second segment of the route, the level-1 (L1) route, connects the DFD to the second level cock buffer (SLCB).

Interesting... I'd have expected SLCB to stand for second level clock buffer .

 

[pm]

Originally posted by: CTho9305
Interesting... I'd have expected SLCB to stand for second level clock buffer .

Think big chickens, Chris. Big chickens.

Uh, next time I write a paper for an electrical engineering journal, I'll have to remember to ask you to proofread it.

 

[imported_Lucent]

1.) Many of the posts state that the metallic conductors (copper wire, traces) carry Electromagnetic Waves. I may be wrong, but doesn't copper wire carry Electric waves while fiber optics carry Electromagnetic waves?

2.) I can think of two possibilities for the squiggly lines:
a. Length of trace needs to be longer and the squiggly lines are needed to get that length
b. The squiggly line cancels Electromagnetic emissions as the current from the same trace go in opposite directions in close proximity.

 

[imported_Lucent]

BTW, my post above refers to the squiggly traces on the circuit board of the video card.

 

[Born2bwire]

Originally posted by: Lucent
1.) Many of the posts state that the metallic conductors (copper wire, traces) carry Electromagnetic Waves. I may be wrong, but doesn't copper wire carry Electric waves while fiber optics carry Electromagnetic waves?

2.) I can think of two possibilities for the squiggly lines:
a. Length of trace needs to be longer and the squiggly lines are needed to get that length
b. The squiggly line cancels Electromagnetic emissions as the current from the same trace go in opposite directions in close proximity.

Copper wire carries electromagnetic waves. This is kind of a misnomer for me to say though. The copper does not "carry" the wave, it directs it between the signal and ground traces. Any interconnect is really an electromagnetic waveguide, but when we talk about most circuits, we only consider low frequency signals. In this case, we can decouple the wave equations into quasi-static or static cases. At this point we do not need to think of them as waves but as separate electric and magnetic fields. Still, the mechanism is the same, it is just that the wavelength is so large compared to the system that the physics can be greatly simplified without compromising accuracy. However, when we are talking about the signals in computers, we are beginning to approach or reside in the microwave regime. And here we need to think of the interconnects as waveguides and take into account basic EM wave principles. We still can make a lot of simplifications, but we can no longer think of the wire as an ideal entitiy.

As for canceling the emissions, there are better ways of doing this. One of the primary is to use differential signals. That is, you send your signal along two lines and at the device you take the difference between the signals. If the lines are in close proximity to each other, then it is a fair assessment to assume that they will have about the same noise induced upon them from nearby lines or radiation. Thus, by taking the difference, we remove the common noise. Another method is to use ground lines adjacent to the trace to act as a shield. And finally, you generally want to avoid the discontinuities that arise from bends in the line. These discontinuities aid in radiating the signal out of the waveguide. This is done because power is reflected back from the bend, and if it is reflected at the other end of the line then you have the chance that the power begins to resonate and thus act as an antenna. Or, the wave hits the discontinuity and propagates out of the waveguide, this is a simple way of explaining how a patch antenna works.


pm pretty much got it I think. The bends are there to synchronize your timing to prevent logic hazards or skewed clocks. I had totally forgotten about the method for tapering the line to change the timing characteristics as well.

EDIT: Dangit, pm, I'm beginning to wonder if Intel is running out of codenames. I worked on a project with a similar codename and was wondering how I did not know you until I reread the post.