Do you think the once rumored HBM2 Raven Ridge actually exists today as a completed design at AMD?

[cbn]

In the past, I was very skeptical about the existence of a such a processor.

256 GB/s bandwidth for typical client workloads for such a low end GPU?

But then I found out that Bristol Ridge has 1/2 rate DP.....but lacks the bandwidth to actually use most of it for HPC applications.

So then I got to thinking maybe AMD also gave 1/2 rate DP to Raven Ridge as well.....then gave it HBM2 so it actually be useful in HPC or for engineering programs (simulations) primarily using FP64. (Think the type of engineering that would use a 235W 3584sp Nvidia Quadro GP100 with its 1/2 rate DP and 4096 bit HBM2 rather than a 250W 3840sp Quadro P6000 with its 1/32 rate DP and 384 bit GDDR5)

 

[sandorski]

If there's a potential Market for it, I suspect they would have at least explored the idea.

 

[richaron]

Sorry to pooh-pooh your argument, but I read a long time ago that the Vega 20 series was going to be the DP compute card. Of course this may have changed, but I think Vega 10 is designed fundamentally different from the DP/ECC cards "needed" for a lot of scientific/engineering compute.

That being said I have no doubt they've got designs for HBM APUs. I don't think they're "complete" designs, but obviously AMD would have looked into them from various angles. They're one of the possibilities opened up with IF and the HBCC

 

[Alpha One Seven]

I don't really think it makes any difference one way or the other.

 

[cbn]

I read a long time ago that the Vega 20 series was going to be the DP compute card. Of course this may have changed, but I think Vega 10 is designed fundamentally different from the DP/ECC cards "needed" for a lot of scientific/engineering compute.

Yes, Its true that Vega 10 is 1/16 rate DP across all usages (Gamer, Frontier edition, Instinct and FirePro).

However, In the past we have seen Radeons from the same GCN generation differ in DP (Example: GCN 1.2 Bristol Ridge had 1/2 rate DP despite the earlier GCN 1.2 Tonga (FirePro W7100, R9 285, etc) being 1/16 rate DP).

So I'm thinking if Raven Ridge's iGPU were based on Vega 10 (if history repeats itself) it could still have a 1/2 rate DP.

 

[NTMBK]

If they were going to make a HPC APU, they would put a lot more shaders in than Raven Ridge. Even with half rate DP, the compute density would be far too low to be competitive- you'd need too much rack space for the performance you get.

I'd expect something closer to the old HPC APU concept:

Though I suspect that concept never went anywhere.

 

[Glo.]

From Tom's Hardware AMA with Don Woligroski:

Tech_TTT: Are we expecting an AMD APU with onboard HBM2 Memory as shared memory for both System and GPU and no DIMMs slots any time sooner? What are your plans for very low voltage CPU? The Ryzen managed a good 65W TDP for 8 cores. Can we expect a 15W 4 core Ryzen APU to compete with a low voltage Intel CPU?

DON WOLIGROSKI: We're definitely considering different HBM implementations, but we haven't announced anything I can talk to. In a lot of ways the Zen architecture gets more impressive as you provide less power. I can't comment on unannounced laptop parts, but there are great things coming!

They are working on this design. If Raven Ridge is coming for desktop next year, and Samsung, which already supplies AMD with HBM2 for Vega is working on low cost HBM - everything is possible.

4C, 8T/768 GCN5 core design plus 2 GB HBM is pretty viable option for lots of things.

 

[cbn]

If they were going to make a HPC APU, they would put a lot more shaders in than Raven Ridge. Even with half rate DP, the compute density would be far too low to be competitive- you'd need too much rack space for the performance you get.

I do agree if they were using Socket AM4 it would take up some room.

But maybe some kind of BGA cartridge system with multiple HBM2 Raven Ridge SOCs per board (see below for SeaMicro and Intel atom as a rough example).

 

[NTMBK]

I do agree if they were using Socket AM4 it would take up some room.

But maybe some kind of BGA cartridge system with multiple HBM2 Raven Ridge SOCs per board (see below for SeaMicro and Intel atom as a rough example).

Even with that sort of setup, the ratio of CPU/GPU is too high, I suspect. Dedicated GPU servers generally have a single CPU driving multiple high end GPUs. For instance a single 8-core Epyc CPU has 128 PCIe lanes, and could drive up to 16 GPUs (though probably some of the PCIe lanes would be used for I/O, so the total would be lower). That means that the vast majority of the power budget is spent on GPU FLOPs, not CPUs. But Raven Ridge has closer to a 50/50 CPU/GPU power budget split, I would suspect, meaning that for the same number of kilowatts you get fewer GPU FLOPs.

I think a HPC APU could be very potent, but it would need a very different balance of resources. Something closer to an Xbox One X would probably be about right, I suspect, though low single threaded performance might cause networking issues? (Disclaimer: not a HPC professional!) Though of course the X1X doesn't have the 1/2 DP rate.

 

[LightningZ71]

It's all really going to depend on the nature of the code that the HPC will be running. If you have HPC jobs that require a fairly even split of memory management, integer calculations and high precision floating point throughput, then having computing nodes that can do all of those functions both efficiently and quickly would be very helpful. On the other hand, if your code is 95% high precision floating point or fits very well into the high volume SIMD module used in GPUs, then, yes you'd prefer to have a couple of CPU cores handling a herd of GPUs. HPC is not a one-size-fits-all world. From rows of racks filled with blade servers, to custom form factor racks with little compute cubes, to more traditional maximum core performance big-ish iron, all of those form factors are currently in use in one HPC or another. I can definitely see where a high density blade server populated with APU blades that have HBM on the socket and a local flash storage would be very effective in certain computing worlds. It could also server as a solid general-purpose HPC setup for universities where they need a server that's flexible enough to be useful at a variety of workloads without being break-the-bank expensive. Not every HPC setup has to be the absolute fastest at a specific task.

 

[richaron]

Yes, Its true that Vega 10 is 1/16 rate DP across all usages (Gamer, Frontier edition, Instinct and FirePro).

However, In the past we have seen Radeons from the same GCN generation differ in DP (Example: GCN 1.2 Bristol Ridge had 1/2 rate DP despite the earlier GCN 1.2 Tonga (FirePro W7100, R9 285, etc) being 1/16 rate DP).

So I'm thinking if Raven Ridge's iGPU were based on Vega 10 (if history repeats itself) it could still have a 1/2 rate DP.

Well... Call me cynical but I can see another line of thinking which would fit just as well... Because I think it's just as likely AMD have just unlocked performance on BR/Carrizo which they artificially gimped until now (it would certainly explain the odd position of Tonga in the stack).

AMD:
1) refused to release a GCN 1.2 ("Tonga") part with more than 2GB RAM when 290[X] was top dog.
2) refused to release a full die "Tonga" chip to anyone other than Apple when 290[X] was top dog.
3) refused to release any Tonga product with full 384bit memory interface.
All above situations can be "rationalised" with regards to product segmentation.

So I wouldn't put it above them to have also blocked the full DP performance of GCN 1.2 products until now.

Not saying it's true, just providing a realistic alternative. Since they can still maintain product segmentation by blocking ECC support on BR/Carrizo products. CPU's in the same Bulldozer+ family supported ECC...

Edit: about my claims that Vega 10 wasn't design for DP/ECC loads; I've read the the memory subsystem and internal buffers aren't ECC. So simply adding ECC "external" (i.e. onboard but not on die) memory isn't going to cut the cheese as far as some workloads are concerned. This is part of what I meant by "fundamentally different" from cards designed for some scientific/engineering workloads. Opposed to above some chips may be "over" designed and never be fully utilised.

 

[nathanddrews]

I vote "no", but only because of the question phrasing of "completed design".

As an aside, I would rather see a consumer variant of the SSG rather than an HBM APU.

 

[flash-gordon]

I believe it does, the Vega HBCC can't exist just for a mere minimum fps gain on dGPUs.

 

[cbn]

Since they can still maintain product segmentation by blocking ECC support on BR/Carrizo products. CPU's in the same Bulldozer+ family supported ECC...

ASRock claims support for ECC UDIMMs and Bristol Ridge APU for their AM4 motherboards.

Example: This board and this board.

Dual Channel DDR4 Memory Technology
- 4 x DDR4 DIMM Slots
- AMD Ryzen series CPUs support DDR4 2933+(OC)2667/2400/2133 ECC & non-ECC, un-buffered memory*
- AMD 7th Gen A-Series APUs support DDR4 2400/2133 ECC & non-ECC, un-buffered memory*
- Max. capacity of system memory: 64GB**
- 15μ Gold Contact in DIMM Slots

 

[Arachnotronic]

In the past, I was very skeptical about the existence of a such a processor.

256 GB/s bandwidth for typical client workloads for such a low end GPU?

But then I found out that Bristol Ridge has 1/2 rate DP.....but lacks the bandwidth to actually use most of it for HPC applications.

So then I got to thinking maybe AMD also gave 1/2 rate DP to Raven Ridge as well.....then gave it HBM2 so it actually be useful in HPC or for engineering programs (simulations) primarily using FP64. (Think the type of engineering that would use a 235W 3584sp Nvidia Quadro GP100 with its 1/2 rate DP and 4096 bit HBM2 rather than a 250W 3840sp Quadro P6000 with its 1/32 rate DP and 384 bit GDDR5)

I think this chip was a forum fantasy.

 

[Ancalagon44]

I think it might exist as an alternative to Intel's Crystal Well products. Not many will be sold, but you might find a high end laptop that has such a chip. If they can make an APU with 2GB of HBM2 with an additional 8GB of DDR4, it will fly.

Longer term, we might be seeing such an APU as the next console chip.

Think about it - AMD will be able to make cheap, fast gaming APUs. One die can contain 1-2 CCXs (4-8 cores), another die a full Navi GPU, and then 16GB of HBM2. Remember I'm talking about the generation of consoles after PS4 Pro and XBox One X, by which time 16GB of HBM2 will be a little less expensive. Manufacturing costs would be much cheaper with such an arrangement compared to the monolithic chips that they build now.

 

[cbn]

It's all really going to depend on the nature of the code that the HPC will be running. If you have HPC jobs that require a fairly even split of memory management, integer calculations and high precision floating point throughput, then having computing nodes that can do all of those functions both efficiently and quickly would be very helpful. On the other hand, if your code is 95% high precision floating point or fits very well into the high volume SIMD module used in GPUs, then, yes you'd prefer to have a couple of CPU cores handling a herd of GPUs. HPC is not a one-size-fits-all world. From rows of racks filled with blade servers, to custom form factor racks with little compute cubes, to more traditional maximum core performance big-ish iron, all of those form factors are currently in use in one HPC or another. I can definitely see where a high density blade server populated with APU blades that have HBM on the socket and a local flash storage would be very effective in certain computing worlds. It could also server as a solid general-purpose HPC setup for universities where they need a server that's flexible enough to be useful at a variety of workloads without being break-the-bank expensive. Not every HPC setup has to be the absolute fastest at a specific task.

Regarding Memory.......

According the following Paper, AMD is looking for 1TB a node for a future 32C Exascale APU---> http://www.computermachines.org/joe/publications/pdfs/hpca2017_exascale_apu.pdf

So I wonder if the 4C Raven Ridge APU would be able to support 128GB of RAM?

 

[LightningZ71]

I haven't seen it listed anywhere that the RR chips will support less than the 128 GB of Ryzen. There shouldn't be any technical reason for a difference as the APUs use a unified memory pool now and the memory controllers aren't any different from what I've seen.