Do Kepler and Maxwell have an AIB future?

[dzoner]

I appreciate your enthusiasm, but let's put that in context:

-"they intended to upgrade the graphics on their fusion chips annually with the previous years graphics architecture"
--> This only indicates the architecture upon which the graphics portion of the APU will be based. It has no implications as to performance (IGP-level, low end discrete, midrange, high-end). For example, the HD 4200/4300 was based upon the previous gen arch, just as the 4870 was. But that doesn't mean the 4200 is as high performance as the 4870, or that the performance is comparable at all.

-"They've also made it very clear APU's = their future. "
--> Also not a hint of performance. When a company says "X is their future", what that means as that it will be a profit-driver (such as an emerging market) in the long term, hence worth investing resources upon. So this statement from them has completely zero to do with performance, and has nothing to do with discrete cards getting phased out.



What's more interesting is your claim that they have a solution to the bandwidth conundrum. So far they (AMD) have made no public statement about it, hence this claim of yours is interesting but currently has no basis in fact.

Don't you think it would be kinda pointless to update the graphics on their fusion chips if they didn't upgrade the performance too? It's not cheap to design and produce a new chip.

An AMD spokesman is on record that Llano will have 'around' 400 shaders.

My 'claim' has basis in numerous AMD slides and statements about Fusion and it's future direction.

Here's what I find puzzling ... that some forum members would stay hung up on this 'bandwidthgate' thing when it implies AMD is predicating the future of their company on an 'unsolvable' problem.

How about if the Fusion motherboard design included a couple of graphics memory sockets next to the cpu socket?

Until very recently nearly all motherboards included the sockets and traces for PATA and FDD ... shouldn't be hard to add some memory sockets to a board with no legacy sockets. There'd be lots of room and sockets are cheap, cheap, cheap.

Am I missing something? Is there some reason this can't be done?

 

[dzoner]

After the original Phenom/Barcelona fiasco, many people may think otherwise.

As others have stated, and which has been actively discussed in the past, I too have my doubts on APU's performing on par with comparable discreet parts.

'comparable' discreet graphics meaning ... ??

 

[jvroig]

Don't you think it would be kinda pointless to update the graphics on their fusion chips if they didn't upgrade the performance too? It's not cheap to design and produce a new chip.

Of course. But "upgrading the performance" doesn't mean from IGP-level it will be low-end or midrange discrete. Rather, compared to last gen's performance, performance will be better. But since that goes for the rest of the lineup in the new gen (discrete low end, midrange, high-end), the pecking order of the graphics offerings (Fusion parts, low end discrete, midrange discrete, and high end discrete) does not necessarily change. Do you see where I am getting at?

So it all depends on whether they actually position Fusion to take over the low-end or not. If their "400" shaders by next gen will only be as powerful as the comparable IGP units by then, and low-end cards will be more powerful while remaining in their relative price brackets, then Fusion won't be eating up any discrete card segment, as all it will do is replace motherboard IGPs.

Of course, if they position Fusion to take over the low-end, then that's a different story. My opinion on that matter has already taken up 2 or 3 of my posts here, so I won't be repeating it.

Here's what I find puzzling ... that some forum members would stay hung up on this 'bandwidthgate' thing when it implies AMD is predicating the future of their company on an 'unsolvable' problem.

How about if the Fusion motherboard design included a couple of graphics memory sockets next to the cpu socket?

Until very recently nearly all motherboards included the sockets and traces for PATA and FDD ... shouldn't be hard to add some memory sockets on a board with no legacy sockets.

"Bandwidthgate" is a valid technical concern. I do not mean that to be "unsolvable", rather that based on all available information today from AMD (not much), there's no hint so far as to how to solve it. This does not mean there is no solution, of course. But in the absence of information, it is perfectly legit to be hung up on it (such as others' shared opinion on the matter), just as it is perfectly legit to be of the opinion that they have surely solved it (such as your opinion on the matter).

Also:

And AMD spokesman said Llano will have 'around' 400 shaders.

No clockspeed, no VRAM amount, no memory bandwidth. Saying the number of shaders does not tell the complete picture, or allow us to definitively predict the performance.

That is the "con" aspect. As for a more "pro" aspect, you should also claim that Ontario/Zacate (with less shaders and more limited power constraints) managed an SB-like offering, therefore Llano (bigger chip, more shaders, much higher power envelope) should be far better. That is a much better argument than simply saying "400" shaders, which mean nothing in the absence of other relevant specs such as those I've mentioned earlier. In fact, that is what I mentioned in the thread about the Zacate GPU performance preview. That's why I am excited about Llano.

 

[busydude]

'comparable' discreet graphics meaning ... ??

Llano is rumored to have 480 SP's which in theory should beat 5670 easily(400 SP). That might not be the case in reality.

Case(s) in point:
Bandwidth- 64 GB/s Vs 35.2 GB/s(operating at 2200 MHz)
TDP: 61 Watts

Granted that the TDP of the APU will be lower as all the extra components including the VRAM are not part of the chip anymore, but to achieve a reasonable TDP I am sure AMD are going to clock it substantially lower.

 

[dzoner]

Of course, this has always been a concern, hence I am sure NVIDIA and ATi made sure to keep IGP performance as low as they were. The only thing different now is that Intel is in the picture, seemingly committed to improve their graphics (their SB offering exceeded every expectation, despite their previous one being the same old subpar Intel "decelerator"), so AMD may not have the luxury of artificially limiting IGP performance (now within Fusion) to keep from cannibalizing their highest-volume segment of discrete cards.

Indeed. As the referenced Anand article clarifies, AMD has designed and roadmapped Fusion to simultaneously take on Nvidia and Intel and win against both. Whether they can do so is unknown, but AMD most definitely is aware of the future threat Intel poses with their APU chips.

That AMD is planning to leverage annual gpu updates to their Fusion chips to provide a competitive edge against Intel's cpu edge as to provide a compelling reason for upgraders to choose AMD over Intel indicates to me they consider Intel the real future competition and THAT competition, driving Fusion gpu performance increases that rapidly eat up the chain of AMD discreet cards, will kill Nvidia in the consumer graphics AND professional graphics space almost as a side effect. The professional space because as a result of that AMD-Intel APU competition Nvdia will lose their low and mid range consumer OEM and AIB markets faster than they can compensate by growing their HPC and professional markets, leaving them without the economics that would keep them competitive against AMD and eventually Intel in the professional market. Nvidia cannot continue taking on the costs of cutting edge graphics architectures and chip development that never turn a profit.

There's a REASON JHH made an all in bet, chancing a massively complicated/die sized new architecture on a new node process known to be problematic. There is a commensurate consequence when he lost that bet.

The move to retail is a sign of his desperation, and almost certainly a short term attempt to shore up Nvidia's quarterly statement bottom line until they can get SOMETHING else generating sufficient revenue.

Those financial analysts JDD has been snow-jobbing aren't going to stay snow-jobbed if there's 3 and then 4 and then 5 straight quarterly report with falling revenues and diminishing cash on hand. Nvidia stock is going to get HAMMERED and the valuation take a swan dive off a cliff.

Along about then JHH is tossed overboard and/or Nvidia is snapped up and sold off piecemeal.

As far as AMD goes, THEIR (far beyond console based game graphics needs) high end AIB future will evolve around the OpenCL/OpenGL efforts, Eyefinity, growing Professional market and HPC with their R&D subsidized by their APU sales.

 

[dzoner]

Llano is rumored to have 480 SP's which in theory should beat 5670 easily(400 SP). That might not be the case in reality.

Case(s) in point:
Bandwidth- 64 GB/s Vs 35.2 GB/s(operating at 2200 MHz)
TDP: 61 Watts

Granted that the TDP of the APU will be lower as all the extra components including the VRAM are not part of the chip anymore, but to achieve a reasonable TDP I am sure AMD are going to clock it substantially lower.

AMD has indicated the performance will not match the 5670 for whatever reason.

But Llano is a stopgap transition architecture to keep down the variables while getting Fusion off the ground. The REAL Fusion chips start when the Bulldozer cpu core is integrated with a 6-7xxx graphics core.

 

[Genx87]

They don't actually have to make an APU that rivals the high-end.

All they need to do is manage to solve the bandwidth problems for what is equivalent to the entire low-end segment. (That would still take some doing, but more doable than shooting for high-end)

I understand they dont need to rival high end discrete parts. However one of the cheerleaders was touting a fusion part with 5970 performance in 2013. To attain 5970 performance in 2013 I would imagine they need to approach the 256GB\sec in memory bandwidth that card presently has. And by 2013 the 5970 will be a low end part. Hell even the 5770 has 75GB\sec in memory bandwidth. 3x what is currently available to triple channel high end Intel platforms. The only way I see them conquering this is by adding a large on die local memory cache. But that adds to the size and heat of the chip which will make it hard to manufacture in the low end space.

 

[jvroig]

I understand they dont need to rival high end discrete parts. However one of the cheerleaders was touting a fusion part with 5970 performance in 2013. To attain 5970 performance in 2013 I would imagine they need to approach the 256GB\sec in memory bandwidth that card presently has. And by 2013 the 5970 will be a low end part. Hell even the 5770 has 75GB\sec in memory bandwidth. 3x what is currently available to triple channel high end Intel platforms. The only way I see them conquering this is by adding a large on die local memory cache. But that adds to the size and heat of the chip which will make it hard to manufacture in the low end space.

Ah, understood, I see what you mean now. That particular context was not clear to me, so I took your response at face value.

I will have to agree that 5970-level performance in an IGP by 2013 may be too much to ask, barring any immense innovation that so far AMD has given no hints about.



Also, I agree with your last point, but it seems you've decided to edit it out (I read it in full in the notification email that alerted me of your message). I understand why you may have opted to edit it out - it is also something I've wanted to bring up in my posts that hypothesize about the effects Fusion may have on discrete cards, but my better judgement told me:
1.) it may spark a religious debate
2.) this is not the correct forum for such a discussion.

 

[dzoner]

"Bandwidthgate" is a valid technical concern. I do not mean that to be "unsolvable", rather that based on all available information today from AMD (not much), there's no hint so far as to how to solve it. This does not mean there is no solution, of course. But in the absence of information, it is perfectly legit to be hung up on it (such as others' shared opinion on the matter), just as it is perfectly legit to be of the opinion that they have surely solved it (such as your opinion on the matter).

Would one or two 'sideport' memory modules alongside the CPU solve the problem?

 

[dzoner]

I understand they dont need to rival high end discrete parts. However one of the cheerleaders was touting a fusion part with 5970 performance in 2013. To attain 5970 performance in 2013 I would imagine they need to approach the 256GB\sec in memory bandwidth that card presently has. And by 2013 the 5970 will be a low end part. Hell even the 5770 has 75GB\sec in memory bandwidth. 3x what is currently available to triple channel high end Intel platforms. The only way I see them conquering this is by adding a large on die local memory cache. But that adds to the size and heat of the chip which will make it hard to manufacture in the low end space.

I believe that 5970 reference might have been an exasperation based pointing out of what a pure (idealized) logrithmic progression MEANS as applied to a yearly gpu update on Fusion chips - which AMD has definitively committed to.

The reality of course would be a quasi-logrithmic progression dependent upon a number of variables. So instead of 5970 performce, maybe 'only' 5870 perfornance, taking into account the efficiencies an APU provides.

The salient lesson is Fusion APU graphics capabilities will progress far faster than most posters seem able to comprehend or willing to countenance.

Which stikes to the heart of the OP question.

To my reasoning, Nvidia's recent invasion of their AIB partner's retail operation re-inforces an answer of NO to that question.

 

[Genx87]

I believe that 5970 reference might have been an exasperation based pointing out of what a pure (idealized) logrithmic progression MEANS as applied to a yearly gpu update on Fusion chips - which AMD has definitively committed to.

The reality of course would be a quasi-logrithmic progression dependent upon a number of variables. So instead of 5970 performce, maybe 'only' 5870 perfornance, taking into account the efficiencies an APU provides.

The salient lesson is Fusion APU graphics capabilities will progress far faster than most posters seem able to comprehend or willing to countenance.

Which stikes to the heart of the OP question.

To my reasoning, Nvidia's recent invasion of their AIB partner's retail operation re-inforces an answer of NO to that question.

You really expect 5870 level performance out of these things? Unless they solve the memory problem it is a pipedream for gaming. I could see 5870 level performance in GPGPU for off the shelf applications.

 

[dzoner]

You really expect 5870 level performance out of these things? Unless they solve the memory problem it is a pipedream for gaming. I could see 5870 level performance in GPGPU for off the shelf applications.

Sure. We're talking the high end APU here. Far less price sensitive.

Why couldn't there be a gpu memory socket or two next to the APU socket?

Bulldozer will occupy the enthusiast/high end gaming niche when the first generation Fusion chips arrive, but the second generation desktop Fusion chips will have Bulldozer cores. That top end Fusion chip will be a low end enthusiast/gamer cpu chip. Generation 3 will be an enthusiast/gamer chip sufficient for single monitor systems.

 

[Genx87]

Sure. We're talking the high end APU here. Far less price sensitive.

Why couldn't there be a gpu memory socket or two next to the APU socket?

Bulldozer will occupy the enthusiast/high end gaming niche when the first generation Fusion chips arrive, but the second generation desktop Fusion chips will have Bulldozer cores. That top end Fusion chip will be a low end enthusiast/gamer cpu chip. Generation 3 will be an enthusiast/gamer chip sufficient for single monitor systems.

In 2013 5870 will be low low end performance. Sub 50 dollar card. If that is a high end fusion what will be a low end fusion?

If you start adding in memory sockets or on die memory costs will go up. This thing is supposed to erase the sub 100 market right? How feasible is it to have budget computers have a seperate memory system just for memory?

 

[dzoner]

In 2013 5870 will be low low end performance. Sub 50 dollar card. If that is a high end fusion what will be a low end fusion?

If you start adding in memory sockets or on die memory costs will go up. This thing is supposed to erase the sub 100 market right? How feasible is it to have budget computers have a seperate memory system just for memory?

No it won't. Low low end performance today is the 80spu 5450. That's 20x smaller than the 5870.

The 8670 may 'only' provide 5870 performance, but that will still be good enough to play almost all 2013 (mostly console port) computer games at 1080P at moderate to high settings.

 

[busydude]

AMD has indicated the performance will not match the 5670 for whatever reason.

The reasons are inherent and have been already discussed.

But Llano is a stopgap transition architecture to keep down the variables while getting Fusion off the ground. The REAL Fusion chips start when the Bulldozer cpu core is integrated with a 6-7xxx graphics core.

That does not change it even one bit. The TDP of an APU is limited, AMD does not have much leeway to add a high-end GPU.

 

[psoomah]

The reasons are inherent and have been already discussed.



That does not change it even one bit. The TDP of an APU is limited, AMD does not have much leeway to add a high-end GPU.

They will at 22nm with optimised to fare thee well cpu and gpu cores.

 

[Genx87]

No it won't. Low low end performance today is the 80spu 5450. That's 20x smaller than the 5870.

The 8670 may 'only' provide 5870 performance, but that will still be good enough to play almost all 2013 (mostly console port) computer games at 1080P at moderate to high settings.

You have no idea what games will be like in 3 years. By then the next generation of xBox and Playstations should be out. Ports will be based on those hardware specs. I dont expect fusion to actually perform like a 5870 either.

 

[AtenRa]

What people seam to forget is that APUs target the very low, entry level computer systems. Llanos CPU performance will be near Athlon II which by Q2 2011 will be entry level and not middle or high end. Its GPU will be in the region of the 55xx series which again in Q2 2011 will be in the entry level segment and not middle.

In order to keep the die size small with Llano, they probable will not install an L3 cache and that will have a big impact in both CPU and GPU performance. Remember that SBs GPU performance came from the L3 and not from the shaders.

 

[Keysplayr]

I think there are too many "will be" statements. All of these would do better replaced with "could" or "might" be.

 

[dzoner]

I think there are too many "will be" statements. All of these would do better replaced with "could" or "might" be.

You might be right. Could be I'll try and keep tabs on my use of 'will' and 'is'.

 

[AtenRa]

I guess we will see Kepler and Maxwell and many more GPUs from both AMD and NV in the future

 

[blastingcap]

I guess we will see Kepler and Maxwell and many more GPUs from both AMD and NV in the future

For anyone wondering, "EPG" stands for Embedded Processor Graphics, like what Intel is putting into Sandy Bridge. It's good for basic stuff like 2D and maybe even transcoding or whatever other hardware makes it into the EPG. APUs are supposed to have gaming-grade graphics on-die. This will become the midrange solution to graphics. The next step up from there would be to get a discrete GPU for top graphics performance.

...According to that slide, anyway... who knows the future for sure?