CPU Overclocking, Vcore MAX myths and truth

[Gillbot]

Originally posted by: Gillbot
Most people accept that ~1.4v is max for vcore on 45nm chips and ~1.5v for 65nm. There is misconception that it should be 1.4v via Windows through CPU-z or other software vs. voltage set via BIOS. I always say via bios because you are basically overvolting to achieve 1.4v via windows.

This gap you are compensating for is called Voffset.

Among other things (like eliminating Vdroop), LLC (loadline calibration) is tuned to make Voffset = 0. You can do this manually by upping the Vcc in the BIOS until the Vcore shown at idle in Windows is equal to your target Vmax (1.4V in this example) but then you have expose your CPU to the peak voltage transient during overshoot when the cpu goes from a loaded state to an unloaded state.

(source)

So keep in mind that when you determine the MAX Vcore you decide to use on your CPU, be sure it is via BIOS voltage and not through windows, CPUz or any other software monitoring program.

 

[alkalinetaupehat]

Does this mean that enabling LLC is a good idea?

 

[soccerballtux]

Originally posted by: Gillbot

Originally posted by: Gillbot
Most people accept that ~1.4v is max for vcore on 45nm chips and ~1.5v for 65nm. There is misconception that it should be 1.4v via Windows through CPU-z or other software vs. voltage set via BIOS. I always say via bios because you are basically overvolting to achieve 1.4v via windows.

This gap you are compensating for is called Voffset.

Among other things (like eliminating Vdroop), LLC (loadline calibration) is tuned to make Voffset = 0. You can do this manually by upping the Vcc in the BIOS until the Vcore shown at idle in Windows is equal to your target Vmax (1.4V in this example) but then you have expose your CPU to the peak voltage transient during overshoot when the cpu goes from a loaded state to an unloaded state.

(source)

So keep in mind that when you determine the MAX Vcore you decide to use on your CPU, be sure it is via BIOS voltage and not through windows.

The harmonic oscillations are at such a high frequency and return to norm fast enough that they're hardly important.

Vdrop (or as you call it Voffset) is nothing but voltage division of the source voltage over the [and I'm vastly oversimplifying this] thevenin resistance of the CPU (we can imagine it has one for our purposes here). Or simply subtract (the current going to the CPU)*(resistors in series with CPU). IE, vdrop and vdroop are the same effect; just different terms used to refer to full idle and full load.

The voltage reports in CPUz are pretty accurate.
The voltage oscillations occur any time the load on the CPU changes-- not only when LLC is enabled; so they're not that important. Personally, I'd say LLC is great because you don't have the CPU sitting at extra voltage while idle just to make sure it has enough voltage at load.

 

[BonzaiDuck]

Well, the article recommended leaving LLC disabled. I don't have an Intel chipset, or at least, with a 780i chipset, I don't have the LLC feature.

But I think the point of the article was this: there is a negative overshoot going from light to heavy load, and a positive spike rebounding from heavy load to idle. And the enabling of the LLC feature increases the difference between those two extremes. So -- even if the spikes don't cause damage to the CPU, they increase overall instability over a wide range of normal use that might be missed otherwise through stress-testing.

I think they also introduce the possibility that load voltage can actually exceed idle voltage with LLC enabled.

 

[Idontcare]

Originally posted by: BonzaiDuck
I think they also introduce the possibility that load voltage can actually exceed idle voltage with LLC enabled.

Yes it can exceed idle voltage, in fact for my rig it does.

This is fundamentally no different than having C1E enabled, when your CPU is idle the Vcc is lowered, when the chip is loaded the Vcc is increased. C1E does this, LLC does this.

The topic of LLC is one of recurring discussion in these forums as well. Let me paste a few of my past posts on the topic to see if we can head off some of this "I thought LLC is evil" discussion at the pass:

Originally posted by: Idontcare

Originally posted by: GundamF91
The only thing that still concerns me is Anandtech's article. It shows why LLC works, and also why LLC can be detrimental.

Emphasis on the "can" be. Any form of overclocking can be detrimental if done in foolish manner (extreme values or inadequate cooling of the relevant components).

Setting your Vcore to 1.8V w/o LLC is no less detrimental than setting it to 1.7V w/LLC (in either case your CPU is likely being exposed to 1.8V or higher during transitions to unloaded conditions).

So just don't abuse it and you'll be fine. You don't set your Vdimm to 2.8V do you I wouldn't be worried about the lifetime reduction your CPU is no doubt experiencing because of the voltage spikes during unload thanks to your use of LLC.

You are still going to replace that chip in 2 yrs regardless whether it has another 5yrs or 10yrs of functional life remaining. (as will I!)

http://forums.anandtech.com/me...id=28&threadid=2221122

Originally posted by: Idontcare

Originally posted by: Mango1970
Thank you just got a chance to read that - can't believe I missed that article. Heck disabling Load line calibration worked wonders alone. Thanks.

load line calibration (referred to as LLC in the forums) is like a knife, it'll do bad things if used improperly but can be very handy and useful when used properly for the right situation.

Sharp knifes make for bad pillows, and pillows make for bad meat cutters.

I use LLC and it helps me immensely for my situation, others not so much. Whether you meet someone who adores or vilifies LLC kinda comes down to whether you are meeting someone who needed a pillow but kept using a knife, or needed a knife but kept using a pillow, versus a person who needed a knife and was thankful he found one in the kitchen drawer (BIOS) when he went there.

http://forums.anandtech.com/me...id=28&threadid=2227770

Originally posted by: Idontcare

Originally posted by: BonzaiDuck

With Load Line Calibration disabled in BIOS, setting a CPU Voltage VID of 1.38750 resulted in a no-load voltage of about 1.34V and a full-load value of 1.28V. Enabling this feature and lowering the VID to 1.35000V produced a constant CPU supply voltage, regardless of load (or so it seemed), of 1.33V. Setting a lower VID resulted in a blue screen during Windows boot. Idle voltage was relatively unchanged at about 1.33-1.34V but the full-load voltage required increased by 50mV with no benefit. As you might guess, we recommend you leave this option disabled.

Why have you enabled LLC when the Anandtech article on over-clocking recommended disabling it?

LLC is one of those multi-faceted tools, which can be optimized for providing benefits that outweigh the risks or if left unoptimized can provide so little benefits (or needlessly elevated risks) that it is decidedly undesirable.

I personally use LLC and found it to be of significant value in the manner I use it.

But I agree with Anandtech in guiding folks away from it in general as if you are prone to doing nothing more than enabling it in the BIOS and then walk away from it then yes you have very likely enabled an option in your BIOS that is going to be more detrimental to your CPU than had you left it disabled and proceeded to beat the shit out of your CPU with higher Vcc at idle to buffer against the inevitable Vdroop under load.

Kinda like how water-cooling, vapor-phase cooling, dry ice cooling, and LN2 cooling (in order of increasing difficulty) are generally not recommended wholesale for the masses as they can do more harm than good in the hands of a lot of naive individuals.

No different for pin mods, tape mods, etc. No one is going to be so foolish as to recommend them for everyone.

Also no different from lapping. Done correctly and there is substantial benefits to be had. Done incorrectly or poorly and the result can range from no benefits to even worse results had the lapping never been attempted.

Its of no surprise to me that Anandtech elected to formally recommend people not use LLC.

http://forums.anandtech.com/me...id=28&threadid=2230063

Originally posted by: Idontcare
I'm not entirely sure why Anandtech tends to be officially down on LLC so much in their reviews but personally LLC makes all the difference in my ability to hit a 24x7 stable 4GHz overclock on my QX6700 under phase.

If I take it off LLC then I have to push nearly an extra 0.1V (1.60V versus 1.50625V) thru the chip to keep it small FFT stable at 4GHz...which is then not viable for 24x7 operation at full load because the extra voltage at that GHz pushes the total power consumption above my vapochill's refrigeration capacity.

I agree LLC is not the only way to successfully and safely overclock, but I haven't quite figured out why LLC is vilified as much it seems to be across the web.

I've encountered no reportings of LLC actually killing a chip, and you can bet it would have long ago disappeared from ASUS mobo BIOS options if it were in fact fingered by Intel's returns dept as a highly likely suspect were any rash of in-field chipkills occurring from users with Asus mobos in their rigs.

So...I guess it just feels good sometimes to be haten on something, and LLC generously stepped up to fill that role quite nicely.

http://forums.anandtech.com/me...id=28&threadid=2247232

Originally posted by: Idontcare

Originally posted by: LarryJoe
Could be a Dell thing.

Dell could be using LLC (load line calibration) to stabilize Vcc. I use LLC on my Asus X38 board and it is pretty nice. In fact without it I cannot get that 4GHz overclock mentioned above in this thread.

Yes the Anandtech article goes to great lengths to vilify LLC, but like all tools there are ways to use it to positive effect just as there are ways to abuse it (negligence basically) to negative effect. IMO the Anandtech article focuses entirely on the potential negative aspects of LLC.

At any rate I am just mentioning LLC here as it is a possible explanation for the OP's observation of negligible variation on the reported Vcc in CPU-Z. I have similar observations as well, LLC does make CPU-Z Vcc rock steady (at least it does on my Asus P5E WS Pro).

edit: Just more data on comparison of the voltage fluctuation without LLC and with LLC during an OCCT run. (source)

http://forums.anandtech.com/me...id=28&threadid=2251842

Originally posted by: Idontcare


Yeah the poor man's method here would be to think of the "area under the curve". Voltage over time. What's worse, 1.7V for 100ms or 1.6V for 500ms?

Neither option is good, but knowing which is worse is only half the question, the other half of the question is figuring out when not good means unacceptably not good versus acceptably not good.

For example, running my chip at 1.6V is not good, but that may merely mean the chip will die in 3 yrs instead of 20. So that is acceptably not good. But running my chip at 1.7V may mean it dies in 6 months, and for me that may be unacceptable...ergo unacceptably not good.

So is LLC "not good"? Undoubtedly. Is it unacceptably not good? No one has reported LLC killed their chip yet, and we got a pretty sizable active Internet community these days.

Is LLC more acceptable than running your chip at an otherwise higher idle voltage to compensate for the lower Vcc during load because of Vdroop? Contrary to Anandtech's article on the topic, it would appear that it is more acceptable in certain scenarios, as soccerballtux outlined.

I'll add my personal experience to this otherwise theory-based discussion. Without LLC my QX6700 required 1.60V for 4GHz stable at load (this was under phase, so scale the GHz down but keep the Vcc the same to convert this to an "on air" example) but with LLC my chip only needed a 1.50V Vcc. (edit: corrected the voltages, I had them 0.05V too high once I looked at my notes, memory getting weak)

Now the dominant mechanisms of voltage induced degradation are exponentially dependent on the voltage (i.e. your typical activation barrier kinetically limited reactions), so the ability to run my chip 0.1V lower in Vcc during all those hours of the system being idle means a substantial improvement in lifetime versus the trade-off that comes in transients that may spike to 1.75V (0.2V over-volt transient) for a few hundred microseconds when the chip goes from loaded to unloaded.

Both options are *not good* for my chip by Intel's specs and standards, but the question is whether or not one of the two options is unacceptably not good. I have no way of knowing, but I opted for the LLC choice and ran my chip at 0.1V less. It may have merely made the difference between my chip living 4 yrs instead of 5 yrs, I have no plans of giving it the chance to let me find out. It will be replaced long before then.

http://forums.anandtech.com/me...id=28&threadid=2281530

 

[nevbie]

Originally posted by: soccerballtux
The voltage oscillations occur any time the load on the CPU changes-- not only when LLC is enabled; so they're not that important. Personally, I'd say LLC is great because you don't have the CPU sitting at extra voltage while idle just to make sure it has enough voltage at load.

If we assume that your CPU crashes when voltage gets too low, then these oscillations are important. LLC on has higher differences between highest and lowest actual voltage.

When comparing settings where idle voltages are the same, other with LLC on, other with LLC off, LLC makes your CPU run "too high" voltage during the load.. that is all it does, hence the overshoot is greater from that voltage level. Here the "too high" would be the same as idle voltage.

With the same actual idle voltage, LLC seems to consume more power and have higher voltage variation.. why would that be good? Min voltage would be the same in both cases, so if that defines stability, stability should be equal in both cases.

 

[Idontcare]

Originally posted by: nevbie
If we assume that your CPU crashes when voltage gets too low, then these oscillations are important.

The "low-voltage causing a crash during load" scenario is no more plausible/likely from voltage ringing with LLC enabled versus disabled.

If your system is running on the hairy edge of stability when it comes to Vcc ringing upon load then you aren't likely to pass prime95 or OCCT either as the chip begins to heats up and reducing the signal/noise margin even when the signal (Vcc) has finally stabilized after 100 micro-seconds.

The concerns with LLC isn't under-voltage but rather over-voltage.

The under-voltage transient delta that exists when a chip is loaded is there regardless of whether LLC is active or not.

Originally posted by: nevbie
LLC on has higher differences between highest and lowest actual voltage.

This is news to me. Link to the data so I can read up further?

Originally posted by: nevbie
With the same actual idle voltage, LLC seems to consume more power and have higher voltage variation.. why would that be good? Min voltage would be the same in both cases, so if that defines stability, stability should be equal in both cases.

Read my post above regarding "both options are not good". Neither LLC nor OC'ing involve doing what is good for your CPU...both are "not good" for the system. The question is under what set of operating conditions is a tuned LLC rig suffering more harm than it otherwise might be suffering at the hands of a tuned non-LLC setup?

The answer is strictly dependent on the usage patterns (load/unload cycle rate versus idle/loaded time ratios) of the user. There is no "one right answer".

 

[nevbie]

Originally posted by: Idontcare

Originally posted by: nevbie
LLC on has higher differences between highest and lowest actual voltage.

This is news to me. Link to the data so I can read up further?

http://images.anandtech.com/re...ransient_no_offset.jpg
and
http://images.anandtech.com/re...o_vdroop_no_offset.jpg
give that idea.

 

[Gillbot]

Originally posted by: soccerballtux

Originally posted by: Gillbot

Originally posted by: Gillbot
Most people accept that ~1.4v is max for vcore on 45nm chips and ~1.5v for 65nm. There is misconception that it should be 1.4v via Windows through CPU-z or other software vs. voltage set via BIOS. I always say via bios because you are basically overvolting to achieve 1.4v via windows.

This gap you are compensating for is called Voffset.

Among other things (like eliminating Vdroop), LLC (loadline calibration) is tuned to make Voffset = 0. You can do this manually by upping the Vcc in the BIOS until the Vcore shown at idle in Windows is equal to your target Vmax (1.4V in this example) but then you have expose your CPU to the peak voltage transient during overshoot when the cpu goes from a loaded state to an unloaded state.

(source)

So keep in mind that when you determine the MAX Vcore you decide to use on your CPU, be sure it is via BIOS voltage and not through windows.

The harmonic oscillations are at such a high frequency and return to norm fast enough that they're hardly important.

Vdrop (or as you call it Voffset) is nothing but voltage division of the source voltage over the [and I'm vastly oversimplifying this] thevenin resistance of the CPU (we can imagine it has one for our purposes here). Or simply subtract (the current going to the CPU)*(resistors in series with CPU). IE, vdrop and vdroop are the same effect; just different terms used to refer to full idle and full load.

The voltage reports in CPUz are pretty accurate.
The voltage oscillations occur any time the load on the CPU changes-- not only when LLC is enabled; so they're not that important. Personally, I'd say LLC is great because you don't have the CPU sitting at extra voltage while idle just to make sure it has enough voltage at load.

I disagree. Transient voltages can be very damaging even in short duration. We are less concerned with the actual time, and more with the peak voltage. Think lightning, Yes it's an extreme example but you get the idea. It's an extremely short duration event yet can be catastrophic for switchgear, even gear rated for voltages similar to that of lightning itself.

 

[Idontcare]

Originally posted by: nevbie

Originally posted by: Idontcare

Originally posted by: nevbie
LLC on has higher differences between highest and lowest actual voltage.

This is news to me. Link to the data so I can read up further?

http://images.anandtech.com/re...ransient_no_offset.jpg
and
http://images.anandtech.com/re...o_vdroop_no_offset.jpg
give that idea.

You make me LOL when you link the same graphs I have linked to over and over again. (notice was was linked in the OP)

Those graphs are not "data" they are "graphical representations of the author's view on voltage oscillations".

Naturally they do conform to the equation sets that govern voltage ringing (the basis on which the graphs were no doubt created) but do not make the mistake of interpreting the actual extremes of the lines in those graphs as representing collected data.

 

[Idontcare]

Originally posted by: Gillbot
Transient voltages can be very damaging even in short duration.

This is true, which is why Intel power delivery guides call for a max allowed Vcc overshoot of 50 mV for 25 µs.

(see page 24 of the Intel processor datasheet)

50 mV = 0.05 V

What we don't know is how many times can the cpu survive X mV overshoot for Y µs before the lifetime is meaningfully impacted. The lifetime is impacted even if it just happens once. But what about a thousand times, or a million times? When does the pattern of load/unload cause enough Vcc overshoots to be a problem for the practical lifetime of the chip? We can never say for certain as we don't have the reliability test data that Intel most assuredly has at their disposal when creating these specs.

So the question before us is not "is a 100 mV overshoot for 50 µs bad?"...the answer is yes, any voltage (including overshoots) is bad. Your chip will have a longer lifetime if you operate it at 0.9V than if you operate it at 1.0V, or 1.1V, or 1.6V, etc.

But rather the question is "is a 100 mV overshoot for 50 µs so bad that after a couple years of frequent load/unload cycling will my chip die before I replace it?".

This is why suicide LN2 benches at 1.8V and 1.9V are doable - the duty cycle of loading the chip and unloading the chip at those frequencies is not very high given that the test times tend be on the order of hours and not years.

When we add in the question of the value of LLC it even further branches the decision tree because not only must we account for the load/unload frequency but also the total amount of time the chip spends in idle (and at higher Vcc if LLC is disabled) versus loaded (and presumably at the same Vcc whether LLC is enabled or disabled).

 

[nyker96]

I think I might need a few more years in school to figure out what this post is saying. but "peak voltage transient " sounds very cool nevertheless :}

 

[beray]

Originally posted by: nyker96
I think I might need a few more years in school to figure out what this post is saying. but "peak voltage transient " sounds very cool nevertheless :}

The ringings originated from voltage shifting from uncompensated loading lo to hi or hi to lo...

After LLC is done, there's no voltage shifting up or down just plain flat-lined, there is basically no transient nor ringing of any kind. If they are there at all, they would be miniscule comparing to uncompensated voltage shifting.

They should have said that when LLC being performed on the CPU while the computer was first turned on, there would be momentarily bigger voltage transients due to load line calibration steps but basicaly zero after LLC steps had been done from then on.

The LLC steps removed the voltage transients permanently until next power on if the LLC data was not already save for next power on. If it had been saved then the LLC needed not be done again.

LLC is normally a one time deal processing.

 

[Gillbot]

Originally posted by: beray

Originally posted by: nyker96
I think I might need a few more years in school to figure out what this post is saying. but "peak voltage transient " sounds very cool nevertheless :}

The ringings originated from voltage shifting from uncompensated loading lo to hi or hi to lo...

After LLC is done, there's no voltage shifting up or down just plain flat-lined, there is basically no transient nor ringing of any kind. If they are there at all, they would be miniscule comparing to uncompensated voltage shifting.

They should have said that when LLC being performed on the CPU while the computer was first turned on, there would be momentarily bigger voltage transients due to load line calibration steps but basicaly zero after LLC steps had been done from then on.

The LLC steps removed the voltage transients permanently until next power on if the LLC data was not already save for next power on. If it had been saved then the LLC needed not be done again.

LLC is normally a one time deal processing.

I believe LLC is an ongoing process, which occurs anytime the CPU state goes from unloaded to loaded and/or vice versa. It is NOT a one time compensation performed at power on.

 

[beray]

Originally posted by: Gillbot

I believe LLC is an ongoing process, which occurs anytime the CPU state goes from unloaded to loaded and/or vice versa. It is NOT a one time compensation performed at power on.

No doubt there are hardware which performed LLC once every power up, but some will only do it just once and only once then never again.

Unless the preset voltage had been changed again by the user or there's a complete change in the load such as a new processor being installed and having a completely new line loading performance curve.

LLC is used to pre-determined the line loading performance curve or how much droop rate needed to be removed.

After LLC is done properly, there is no V-droop, there is no V-offset, there is no v-peak, there is no v-transient... Just a plain flat-lined voltage for any loading hi or lo.

 

[aigomorla]

1.4 is an arbitrary number.

Intel did not give us this value 1.4v

1.4v was found and dertermined by a majorily of long term overclockers who felt 1.4v was the safe spot for these chips when balancing heat, voltage, and longivity.

Intel has no offical word what the max voltage is on a 45nm dual die quad.
(if im wrong please show me an offical link)

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

I believe LLC is an ongoing process, which occurs anytime the CPU state goes from unloaded to loaded and/or vice versa. It is NOT a one time compensation performed at power on.

No doubt there are hardware which performed LLC once every power up, but some will only do it just once and only once then never again.

Unless the preset voltage had been changed again by the user or there's a complete change in the load such as a new processor being installed and having a completely new line loading performance curve.

LLC is used to pre-determined the line loading performance curve or how much droop rate needed to be removed.

After LLC is done properly, there is no V-droop, there is no V-offset, there is no v-peak, there is no v-transient... Just a plain flat-lined voltage for any loading hi or lo.

There is no absolute value that the motherboard can apply to Voffset because the load is not constant nor linear. Load is always changing so the value for Voffset is continually adjusted.

 

[aigomorla]

Originally posted by: Gillbot

There is no absolute value that the motherboard can apply to Voffset because the load is not constant nor linear. Load is always changing so the value for Voffset is continually adjusted.

+1 load is never constant, and neither is voltage.

 

[beray]

Originally posted by: Gillbot

There is no absolute value that the motherboard can apply to Voffset because the load is not constant nor linear. Load is always changing so the value for Voffset is continually adjusted.

Loadline calibration is tuned to remove transients "like eliminating Vdroop".

Without v-droop there is no v-offset and no v-peak. The pre-compensated zero v-droop voltage is not moving up or down or moving any place to have any v-offset or v-peak. It's a plain flat line.

No one including god can pre-compensate for v-droop without already knowing how much v-droop rate actually is.

No one including god can dynamically compensating for v-droop rate without knowing ahead how much should be removed.

LLC is a pre-compensation technique not a dynamic compensation technique. The voltage output from the regulator is pre-compensated using collected load line calibration data.

The pic below is a MYTH for all LLC pre-compensated for zero v-droop. "It's a plain flat line."

http://images.anandtech.com/re...o_vdroop_no_offset.jpg

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

There is no absolute value that the motherboard can apply to Voffset because the load is not constant nor linear. Load is always changing so the value for Voffset is continually adjusted.

Loadline calibration is tuned to remove transients "like eliminating Vdroop".

Without v-droop there is no v-offset and no v-peak. The pre-compensated zero v-droop voltage is not moving up or down or moving any place to have any v-offset or v-peak. It's a plain flat line.

No one including god can pre-compensate for v-droop without already knowing how much v-droop rate actually is.

No one including god can dynamically compensating for v-droop rate without knowing ahead how much should be removed.

LLC is a pre-compensation technique not a dynamic compensation technique. The voltage output from the regulator is pre-compensated using collected load line calibration data.

The pic below is a MYTH for all LLC pre-compensated for zero v-droop. "It's a plain flat line."

http://images.anandtech.com/re...o_vdroop_no_offset.jpg

Regardless, if your vdroop is 0.1v, and LLC adds 0.1v to compensate, when your processor goes from loaded to unloaded, there will be a large peak transient wich is overvolting your chip. This transient will likely vary depending on the load level.

 

[beray]

Originally posted by: Gillbot

Regardless, if your vdroop is 0.1v, and LLC adds 0.1v to compensate, when your processor goes from loaded to unloaded, there will be a large peak transient wich is overvolting your chip. This transient will likely vary depending on the load level.

With LLC pre-compensated zero v-droop preset voltage for 1.15V...

Min load = 1.15V
Med load = 1.15V
Max load = 1.15V
Any load at anytime = 1.15V

There's no voltage transient period, typically "load line calibrated" flat line voltage don't overshoot nor undershoot ever.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

Regardless, if your vdroop is 0.1v, and LLC adds 0.1v to compensate, when your processor goes from loaded to unloaded, there will be a large peak transient wich is overvolting your chip. This transient will likely vary depending on the load level.

With LLC pre-compensated zero v-droop preset voltage for 1.15V...

Min load = 1.15V
Med load = 1.15V
Max load = 1.15V
Any load at anytime = 1.15V

There's no voltage transient period, typically "load line calibrated" flat line voltage don't overshoot nor undershoot ever.

If this is the case, the LLC would have to be dynamically applied because it would have to vary the amount of voltage based on load. This completely negates your statement that it's a "one time fix" compensation.

 

[beray]

Originally posted by: Gillbot

If this is the case, the LLC would have to be dynamically applied because it would have to vary the amount of voltage based on load. This completely negates your statement that it's a "one time fix" compensation.

It negated nothing.

If the load line calibrated droop rate determined to be 4% then it is pre-compensated for a one time fixed 4% at any loading condition.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

If this is the case, the LLC would have to be dynamically applied because it would have to vary the amount of voltage based on load. This completely negates your statement that it's a "one time fix" compensation.

It negated nothing.

If the load line calibrated droop rate determined to be 4% then it is pre-compensated for a one time fixed 4% at any loading condition.

But there's a flaw in your logic. That 4% would be for 100% load, the compensation would be different at say 50% load. The response is NOT linear when it comes to load.

 

[beray]

Originally posted by: Gillbot

But there's a flaw in your logic. That 4% would be for 100% load, the compensation would be different at say 50% load.

4% of 50% load is not the equal of 4% of 100% load.

Originally posted by: Gillbot

The response is NOT linear when it comes to load.

The droop rate is linear from minimum to max load. If its not you should get yourself a real engineer to re-design the power supply.

4% regulation power supplies don't change to 2%, 6%, or 8% regulation due to loading.