CPU "bug" - Need explanation

[otinane]

Hello, i have AMD Phenom II x4 960T BE 3.0 GHz (the well known Thuban 6-core, with 2-core disabled and turned to Zosma).

I haven't unlock it, simce my motherboard and BIOS version don't support it.

I had time to spare, and was using some hardware commands to check my system (Linux - Fedora 24).

I came along with a strange line of results, which on another user (CPU & system) don't appear and i want to hear opinions, if there is something wrong with the CPU.

The command is:

cat /proc/cpuinfo

Spoiler

[root@KFedora /]# cat /proc/cpuinfo
processor : 0
vendor_id : AuthenticAMD
cpu family : 16
model : 10
model name : AMD Phenom(tm) II X4 960T Processor
stepping : 0
microcode : 0x10000dc
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf eagerfpu pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt cpb hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg
bogomips : 6026.55
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate cpb

processor : 1
vendor_id : AuthenticAMD
cpu family : 16
model : 10
model name : AMD Phenom(tm) II X4 960T Processor
stepping : 0
microcode : 0x10000dc
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 4
core id : 1
cpu cores : 4
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf eagerfpu pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt cpb hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg
bogomips : 6026.70
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate cpb

processor : 2
vendor_id : AuthenticAMD
cpu family : 16
model : 10
model name : AMD Phenom(tm) II X4 960T Processor
stepping : 0
microcode : 0x10000dc
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 4
core id : 3
cpu cores : 4
apicid : 2
initial apicid : 3
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf eagerfpu pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt cpb hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg
bogomips : 6026.62
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate cpb

processor : 3
vendor_id : AuthenticAMD
cpu family : 16
model : 10
model name : AMD Phenom(tm) II X4 960T Processor
stepping : 0
microcode : 0x10000dc
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 4
core id : 2
cpu cores : 4
apicid : 3
initial apicid : 2
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf eagerfpu pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt cpb hw_pstate vmmcall npt lbrv svm_lock nrip_save pausefilter
bugs : tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg
bogomips : 6026.61
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate cpb

and along the lines i get:

bugs: tlb_mmatch apic_c1e fxsave_leak sysret_ss_attrs null_seg

for each out of 4-core.

The other guy, don't have that line in results:

 

[JoeRambo]

Your CPU is fine, that other guy has Intel CPU with different features and different bugs (errata in Intel's world).

Linux is detecting CPU features and using them while also working around known limitations and bugs.

 

[LTC8K6]

Technically, there is something wrong with every CPU, I think.

 

[otinane]

So i guess, false alarm.

Thank you people.

 

[ClockHound]

Technically, there is something wrong with every CPU, I think.

True, but in another thousand years or so, the QA experts claim the Z80 will be proved safe for mission critical use. ;-)

 

[BonzaiDuck]

A person has to be really old to remember the Zilog Z80 . . . .

 

[Elixer]

So i guess, false alarm.

Thank you people.

No, not a false alarm, it is a bug.
All programs & hardware have some kind of flaw in them, and the makers of CPUs have microcode that can work around these bugs.
It is good that the kernel (and/or BIOS) knows about these bugs, otherwise, they would cause unexpected results.

This is also why you shouldn't use really old kernels with newer CPUs, since they don't have the fix these issues.

 

[ClockHound]

A person has to be really old to remember the Zilog Z80 . . . .

A person has to be even older to remember the Zilog company name.

 

[otinane]

Could this be because i have activated irqbalance.service (Irqbalance is a daemon to help balance the cpu load generated by interrupts across all of a systems cpus. Irqbalance identifies the highest volume interrupt sources, and isolates them to a single unique cpu, so that load is spread as much as possible over an entire processor set, while minimizing cache miss rates for irq handlers)?

Spoiler

cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3     
  0:        318       6573        440     716156   IO-APIC   2-edge      timer
  1:         0          0          0          2   IO-APIC   1-edge      i8042
  8:         0          0          0          1   IO-APIC   8-edge      rtc0
  9:         0          0          0          0   IO-APIC   9-fasteoi   acpi
14:          0          0          0          0   IO-APIC  14-edge      pata_atiixp
15:          0          0          0          0   IO-APIC  15-edge      pata_atiixp
16:          0          5          0      67988   IO-APIC  16-fasteoi   ohci_hcd:usb3, ohci_hcd:usb4, snd_hda_intel:card0
17:          0          0          0          3   IO-APIC  17-fasteoi   ehci_hcd:usb1
18:          0          0          0          0   IO-APIC  18-fasteoi   ohci_hcd:usb5, ohci_hcd:usb6, ohci_hcd:usb7
19:          0          0          0          0   IO-APIC  19-fasteoi   ehci_hcd:usb2
22:          0      21172       8921       8074   IO-APIC  22-fasteoi   ahci[0000:00:11.0], firewire_ohci
26:          0      28831       5279          3   PCI-MSI 1048576-edge      enp2s0
27:          0      14524     199079          9   PCI-MSI 524288-edge      radeon
28:          0          1          0        340   PCI-MSI 526336-edge      snd_hda_intel:card1
NMI:         21         23         22         22   Non-maskable interrupts
LOC:     578506     496444     413718     318345   Local timer interrupts
SPU:          0          0          0          0   Spurious interrupts
PMI:         21         23         22         22   Performance monitoring interrupts
IWI:     155723     136753     126105     127232   IRQ work interrupts
RTR:          0          0          0          0   APIC ICR read retries
RES:     818732     833362     837779     868869   Rescheduling interrupts
CAL:      13643      15517      14972       8168   Function call interrupts
TLB:     241221     243355     219463     225366   TLB shootdowns
TRM:          0          0          0          0   Thermal event interrupts
THR:          0          0          0          0   Threshold APIC interrupts
DFR:          0          0          0          0   Deferred Error APIC interrupts
MCE:          0          0          0          0   Machine check exceptions
MCP:         16         16         16         16   Machine check polls
ERR:          0
MIS:          0
PIN:          0          0          0          0   Posted-interrupt notification event
PIW:          0          0          0          0   Posted-interrupt wakeup event

Or it's 100% hardware issue?

 

[[DHT]Osiris]

You're looking for a problem. There's nothing to be alarmed about. And no, it's not caused by using irqbalance.

 

[BonzaiDuck]

A person has to be even older to remember the Zilog company name.

I was working in Dallas in 1976 when I bought my first TI calculator, and learned to "program" with it as a primitive sort of assembly language. Or -- that's how I remember the experience.

Then I was working in the mid-Atlantic again, and around '79 I went into a Radio Shack and noticed they were selling this . . . computer. I thought it was simply quaint.

And in '82, despite the promotion of the original 8088 IBM PC, I acquired a Sinclair ZX-81. So I remember the Z80 processor . . . I can't believe I wasted money on the Sinclair, but I was actually able to use it for serious work. Let's say "I learned a lot." What else would I have used a black and white 12" TV for, anyway?