Couple of CPU questions

[d4mo]

Ok here goes:

1) on a dual core processor when it say say 2 ghz, thats 2 ghz total correct not 2 ghz per core. Also if it is 2ghz total, how is that split up. Could say one core git all 2 ghz and the other get none, or is there some sort of ratio system.

2) With CPU cache, say it has 512kb. Is that 512kb total, or 512kb per memory index(or w/e it's called). If it is per memory index, what is the total space it can use.

3) Also on dual core processors sometimes the L2 caches says 2x 1mb and some say 1mb. Is 2x 1mb mean that each core gets it's own L2 cache?

 

[jgigz]

1) It is 2ghz per core
2)It sorta goes in hand with #3 when you see 2x1mb cache each core has a total of 1mb. If it says 2mb then it is a total of 2mb (i think its safe to assume split evenly)

 

[Aluvus]

1. Both cores are at the rated speed.

2. Whatever it says is what the chip has total.

3. 2x a number means each core has that amount. Without the 2x it means the number is the total L2 cache for the processor, which (depending on the chip) may be one big pool of cache, or two smaller ones.

 

[d4mo]

Thanks for the speedy replys.

Another question, is there a way to have both cores working on the same thing. So if they are both 2ghz to effectively have 4ghz on one thing?

 

[d4mo]

Bump for my last question

 

[swtethan]

Originally posted by: d4mo
Ok here goes:

1) on a dual core processor when it say say 2 ghz, thats 2 ghz total correct not 2 ghz per core. Also if it is 2ghz total, how is that split up. Could say one core git all 2 ghz and the other get none, or is there some sort of ratio system.

2) With CPU cache, say it has 512kb. Is that 512kb total, or 512kb per memory index(or w/e it's called). If it is per memory index, what is the total space it can use.

3) Also on dual core processors sometimes the L2 caches says 2x 1mb and some say 1mb. Is 2x 1mb mean that each core gets it's own L2 cache?

1. 2ghz rating would 2ghz per core

3. I think its 1MB per core max each core(2x 1MB), and its 2MB shared if its 2MB.

so one core could use all 2MB or 1MB

but hey, im a noob so... look it up yourself?

 

[CTho9305]

Another question, is there a way to have both cores working on the same thing. So if they are both 2ghz to effectively have 4ghz on one thing?

Not exactly. Programs have to be specially written to run on both cores at the same time, and even when they are you rarely get a doubling of performance.

 

[d4mo]

So getting a 2ghz Dual core would actaully have worse performance in say, a game, than a single core 3 ghz cpu?

 

[myocardia]

No, Mhz has nothing at all to do with the speed of a processor. Well, unless you're comparing two identical (in every single way) processors. The 2.0 Ghz Athlon X2, and the 1.83 Ghz Core 2 Duo both destroy every 3.0 Ghz P4 ever built.

 

[d4mo]

No, Mhz has nothing at all to do with the speed of a processor. Well, unless you're comparing two identical (in every single way) processors. The 2.0 Ghz Athlon X2, and the 1.83 Ghz Core 2 Duo both destroy every 3.0 Ghz P4 ever built.

Because of HyperTransport or what?[

 

[imported_aashburns]

I would search Wikipedia for Amdahl's Law.
Processors represent a decision of tradeoffs between speed, power, parallelization, performance, and ability to manufacture (fab). These tradeoffs vary between platforms (servers, mobile, etc.), programs (ability to parallelize), performance (number of buses and functional units), manufacturing (yield, die area, net cost, process node).

For an analogy for dual core processors:
Imagine you and your father are cooking a meal. Will both of you working on the meal allow you to eat sooner?

The answer is: it depends.

If you and your father can divide up tasks together, then yes possibly. Otherwise probably not.

Dual core CPUs run at slower speeds because it is harder statistically to yield two cores at the same speed as one core. So, the speed ratings are lower but you have two logical processors. If your program can divide up the work into separate threads or processes, then your dual core processor will run faster, but if that isn't the case, then your single core at a higher speed will win out. So over time, you will find more and more programs which support multiple processors and so dual cores will prevail in the end.

As far as the cache question (2mb or 2x1mb), many people often misquote the truth. Usually when 2mb is listed it means there is 2mb of L2 cache for the die (shared between the cores on the die). However, 2x1mb means there are two cores, each with 1mb of its own cache. Shared caches are more advanced and have several benefits (as well as issues), but are harder to implement.

You may ask, what is the real difference? Well, think about how processor 0 gets information from processor 1's L2 cache. Shared caches mean that either core can use as much cache as it wants (theoretically from 0-4mb for high-end Core 2 Duos) and does not need to ask the other processor for its L2 data (it can just access it as necessary). With split caches, Processor 0 must ask Processor 1 to send it data from its cache, which introduces more latency. Caches are a very interesting subject and you can learn some by searching for cache coherency.

Check this out --> http://www3.intel.com/cd/ids/developer/asmo-na/eng/286311.htm?prn=y

I hope that helps, let me know if you have any more questions.

 

[d4mo]

Everything makes pretty good sense me now, except for when myocardia said "The 2.0 Ghz Athlon X2, and the 1.83 Ghz Core 2 Duo both destroy every 3.0 Ghz P4 ever built. ". I'm still wondering why this is so. The only thing I can think of is the bus speeds.(we were referring to 1 core of a dual core vs. a single core processor rated at higher mhz)

 

[Yellowbeard]

Originally posted by: d4mo
Everything makes pretty good sense me now, except for when myocardia said "The 2.0 Ghz Athlon X2, and the 1.83 Ghz Core 2 Duo both destroy every 3.0 Ghz P4 ever built. ". I'm still wondering why this is so. The only thing I can think of is the bus speeds.(we were referring to 1 core of a dual core vs. a single core processor rated at higher mhz)

Even 1 core of a C2D or Athlon X2 will outperform any 3.0ghz P4 ever made. There are a variety of reasons for this but, the primary reason is that the newer processors execute more insructions per cycle than the older CPUs. That's a simple blanket statement but if you want to read more, study the CPU architectures.

 

[betasub]

d4mo: rather than doing a simple GHz-to-GHz match-up, you first need to consider CPU architecture. The Netburst architecture (Pentium4, PentiumD, and their Celeron offspring) is relatively inefficient, performing less instructions per clock (IPC) than more efficient architectures like the Athlon64/X2 and Core2Duo. For CPUs of the same architecture it's no surprise that higher clock speed wins, but the architecture with higher IPC can afford to run at a slower clock speed and still best a rival architecture with lower IPC.

 

[d4mo]

Isn't CPU architecture like x86, x86-64 or SPARC? Or am I confused?

 

[Markfw]

Originally posted by: d4mo
Isn't CPU architecture like x86, x86-64 or SPARC? Or am I confused?

Thats instruction set (correct my terminolgy if wrong), not architecture. The design of a cpu to execute a series of standardized instructions is architecture.

 

[imported_aashburns]

Architecture refers to the specific implementation of an instruction set. x86 is the instruction set and is convenient because today's x86 processors can run code written 20 years ago.

All these processors break the work of executing an instruction into stages. This process is known as pipelining. The number of stages is arbitrary as there is no right answer.

The P4 architecture has more stages so that an individual stage does less incremental work and thus can be completed faster. As a result, P4s tend to clock to very high frequencies. If it weren't for the whole issue of power consumption we'd probably have 6-7GHz P4s today.

Going back to what I was saying earlier, since the P4 architecture has more stages, the designers made a trade-off by opting for higher frequencies at the expense of reduced amount of work per clock cycle (IPC). In the end, the P4 was designed to maximize Instructions per Second = IPC*frequency. As we all know today, because of power limitations and other factors the P4 architecture is not as efficient as the Core or K8.

d3mo,

Your confusion of between 2.0GHz dual-cores and 3.0GHz single-cores is not trivial by any means. Remember, that frequency is not always a good measure of performance between two products of a different architecture. Benchmarks are the best way to estimate performance as they most closely mirror reality.

I think a more interesting point is that a 2.6GHz K8 Single-Core processor will often outperform a 1.8GHz K8 Dual-Core processor (same architecture). Why you may ask? Well, going back to Amdahl's Law (1/{F + (1-F)/N}), a program would need to be ~61.5% parallelized or non-sequential in order for the two processors to have equivalent performance. In reality, because of inefficiencies at the hardware level with dual-core processors this percentage would need to be even higher.

Today, multi-core processors generally have multiple copies of the same general purpose processor. In the future, a die will contain tens of cores, each simple in design, but specialized to perform very specific tasks, such as audio, video, graphics, physics, encoding, decoding, dsp, etc. At that point, it will become very difficult to say which x-core processor is faster given its speed. Then, benchmarks will become crucial to understanding an overall processor.

 

[d4mo]

Alright thanks for the great explanantions. I was just getting confused because today's processors have gotten so complex, and there are so many of them out there. The last computer I built had an athlon xp 1700+ in it and before that a Duron. It was some much easier to know what was faster/better a couple of years ago.

Also a sidenote quesition, since modern CPU's don't have a FSB(they have hypertranspor), is the only limiting factor for RAM the chipset/motherboard? And is that FSB the bus speed between the RAM and the memory controller(which is the CPU), or is the the speed between the RAM and the northbridge?

 

[Noubourne]

Originally posted by: d4mo
Alright thanks for the great explanantions. I was just getting confused because today's processors have gotten so complex, and there are so many of them out there. The last computer I built had an athlon xp 1700+ in it and before that a Duron. It was some much easier to know what was faster/better a couple of years ago.

Also a sidenote quesition, since modern CPU's don't have a FSB(they have hypertranspor), is the only limiting factor for RAM the chipset/motherboard? And is that FSB the bus speed between the RAM and the memory controller(which is the CPU), or is the the speed between the RAM and the northbridge?

AMD has placed the memory controller inside their CPU. Intel has not done this yet.

Intel chips don't include a memory controller, so you will find it on the northbridge of the motherboard. For Intel, the motherboard (compatibility issues with the CPU aside) is really the determining factor for what kind and speed of RAM can be used.

FSB is a more general term for the bus that connects the CPU to everything else it has to talk to. In today's machines, though, they've really separated the bus to the RAM from the bus(es) to everything else, because it is so common to want to overclock the bus that the CPU and RAM run on in order to speed up the RAM and/or CPU, and other devices may not take kindly to changes in speed, or at least not AS kindly as most CPUs and some RAM might be.

You might want to spend a few hours in Wikipedia. Lots of your questions have answers there.

 

[d4mo]

I've read a few things on Wikipedia, but things there is so much to read and sort though it gets frustrating.

You said that for Intel boards the limiting factor is the motherboard, so what is the limiting factor for AMD boards?

 

[imported_aashburns]

For all processors in relation to the processor speed external memory is the limiting factor, whether it is DRAM or a fixed disk (hard drive).

Location of memory controller:
AMD - inside CPU die, lower latency accesses to memory than external controllers
Intel - external to CPU die, in northbridge chipset, higher latency accesses to memory

Hypertransport is designed with multiple physical CPUs in mind and thus you will find that mutiple processor AMD CPUs have a higher core utilization (closer to theoretical) than Intel's.

What is the limitation on AMD boards?
Since AMD has a lower latency memory interface, they have decided to have a less optimal cache size and speed. As a result AMD system performance is closely related to the memory timings (more expensive memory) than Intel systems. There are several articles about the very limited impact of memory timings on Core 2 Duo systems - this is due to the large, and fast L2 cache. I know future AMD designs will fix this issue by increasing both the cache size and speed.