• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Clarksfield quad-core only 35W TDP, and Lynnfield prices

Page 3 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
Originally posted by: ilkhan
Originally posted by: Denithor
EDIT: BTW could you guys expound on the PCU controlling the cores for better "off" mode in Windows? I thought the way Windows like to hand threads around to all cores would prevent Turbo Mode from ever really being enabled/used properly.
Click to expand...
That IS something Im concerned about. Goes back to needing a nehalem peculiarity aware scheduler in the OS. Would depend on the power profile, I presume.
Click to expand...

Windows still migrates the threads but the PCU does a much better job of powering down the cores rapidly in succession as the threads are migrated off of them.

Basically it is a time-domain and order of magnitude thing. Windows migrates threads no faster than the minimum timeslice which is something like 20 milliseconds whereas the PCU can power down a core (or power up a core) on the the order of microseconds.

So it is still a technical issue but is no longer a practical problem when it comes right down to the end user's experience.
 
This?

920XM = 2.00GHz Base (3.20GHz SC Turbo)
820QM = 1.73GHz Base (3.06GHz SC Turbo)
720QM = 1.60GHz Base (2.80Ghz SC Turbo)

How much $$$?
 
Originally posted by: 21stHermit
This?

920XM = 2.00GHz Base (3.20GHz SC Turbo)
820QM = 1.73GHz Base (3.06GHz SC Turbo)
720QM = 1.60GHz Base (2.80Ghz SC Turbo)

How much $$$?
Click to expand...

Yes. The pricing was revealed before. The 920XM is of course, $999 considering the EE status.

The quad core Turbo needs to be high enough to be competitive with the QX9300/Q9100/Q9000, I'm assuming no more than +3 speed grades or 400MHz. The dual-core Turbo should end up around 2.8GHz for the 920XM.
 
Originally posted by: IntelUser2000
I'm excited at the potential of Turbo Mode. Especially on mobile.
Click to expand...

You think dynamic clocking will ever be implemented in Atom or Larrabee?

Is the die area for the PCU circuitry small enough to lend itself to these disparate products?

IMO the PCU is THE defining circuitry that AMD is sorely lacking in their current flagship products, from X2 to Istanbul.

AMD needs to implement something that serves the same function/role as Intel's PCU.

Their CnQ bugginess is all related to them not having the full power-state control circuitry (as Intel developed), just as the IDA not working on Santa Rosa was due to its lack of the thread migration combating aspects of the PCU. (just my opinion)
 
I seem to remember hearing that the PCU takes more than a million transistors. :shrug:

And whats up with those names? 920XM - 820QM - 720QM ? Different cache amounts or something? Why different first digits and not second digits?
 
Originally posted by: 21stHermit
PCU? What is it? What does it do?
Click to expand...

PCU = Power Control Unit

Originally posted by: ilkhan
I seem to remember hearing that the PCU takes more than a million transistors. :shrug:

And whats up with those names? 920XM - 820QM - 720QM ? Different cache amounts or something? Why different first digits and not second digits?
Click to expand...

Yep, you are right re: 1m xtors, from the same link above:

Nehalem?s architects spent over 1 million transistors on including a microcontroller on-die called the Power Control Unit (PCU). That?s around the transistor budget of Intel?s 486 microprocessor, just spent on managing power. The PCU has its own embedded firmware and takes inputs on temperature, current, power and OS requests.
Click to expand...

So not likely to make it into Atom I guess, but could be used in Larrabee for managing GPU power.
 
Not much use in having it in Atom, which isn't going to transition to dual core on mobile until 32nm. Besides, out of order execution would be a much better use of die space than a PCU or even a second core. Dual core Atom at 1.66ghz with out of order is essentially a Core Duo. Throw in HT and an IMC and you get some serious performance out of it without ever even touching clock speed. Hell, you don't even need the second core.
 
Originally posted by: drizek
Not much use in having it in Atom, which isn't going to transition to dual core on mobile until 32nm. Besides, out of order execution would be a much better use of die space than a PCU or even a second core. Dual core Atom at 1.66ghz with out of order is essentially a Core Duo. Throw in HT and an IMC and you get some serious performance out of it without ever even touching clock speed. Hell, you don't even need the second core.
Click to expand...

Out of order isn't the only one that Core 2 has in advantage over Atom, but of course you know that. The 3-issue(that's 50% more than Atom) OoO core Via Nano with advancements like 128-bit SSE and single cycle shuffle execution is still vastly outperformed by the Core 2.

There's no way to make a Core 2 level CPU in the near future with cellphone-level power.
 
Motherboard prices for these "mainsteam" chips had better be pretty damn low. I really thought this was going to be the time to get into big performance for cheap. For some reason I had it pegged at $100 MB, $200 4ghz OC, $50 for memory. Guessing closer to $150 MB, $280 processor, $50 memory.
 
Originally posted by: drizek
Not much use in having it in Atom, which isn't going to transition to dual core on mobile until 32nm. Besides, out of order execution would be a much better use of die space than a PCU or even a second core. Dual core Atom at 1.66ghz with out of order is essentially a Core Duo. Throw in HT and an IMC and you get some serious performance out of it without ever even touching clock speed. Hell, you don't even need the second core.
Click to expand...

PCU is for improving power-savings, not for enhancing performance.

Obviously it would not be implemented until the next iteration on the microarchitecture, which would be 32nm, so the release timing was not a concern to me here tbh. Regardless, at 1m xtors it makes a hard sell cost-wise for an intentionally cost-sensitive IC like the atom.
 
Originally posted by: IntelUser2000
Originally posted by: drizek
Not much use in having it in Atom, which isn't going to transition to dual core on mobile until 32nm. Besides, out of order execution would be a much better use of die space than a PCU or even a second core. Dual core Atom at 1.66ghz with out of order is essentially a Core Duo. Throw in HT and an IMC and you get some serious performance out of it without ever even touching clock speed. Hell, you don't even need the second core.
Click to expand...

Out of order isn't the only one that Core 2 has in advantage over Atom, but of course you know that. The 3-issue(that's 50% more than Atom) OoO core Via Nano with advancements like 128-bit SSE and single cycle shuffle execution is still vastly outperformed by the Core 2.

There's no way to make a Core 2 level CPU in the near future with cellphone-level power.
Click to expand...

I specifically mentioned Core Duo, as opposed to C2D. CD is basically just two shrunk dothans glued together. They don't have many of hte advancements in C2D, including VT, 64bit, SSE3(could be wrong about this).

Well obviously the Core Duo has tons of L2 cache while the atom has virtually none, but an IMC will help to offset that. I think it can at least be competitive in terms of performance/watt with Core2 ULV.

Keep in mind that the Pentium M was built on 90nm with a 25w TDP, with clock speeds up to 2.26ghz. Lower the clock speeds, be more aggressive with voltages, you can get it down to 20. Now go to 32nm, you are down to 10. Take out the L2 cache and replace it with an IMC, you just saved another 10w from the NB, basically equaling current Atom+Chipset TDP. (am I missing something here? Did I overestimate the power savings from basically 3 generations of die shrinking?)
 
Originally posted by: drizek

I specifically mentioned Core Duo, as opposed to C2D. CD is basically just two shrunk dothans glued together. They don't have many of hte advancements in C2D, including VT, 64bit, SSE3(could be wrong about this).

Well obviously the Core Duo has tons of L2 cache while the atom has virtually none, but an IMC will help to offset that. I think it can at least be competitive in terms of performance/watt with Core2 ULV.

Keep in mind that the Pentium M was built on 90nm with a 25w TDP, with clock speeds up to 2.26ghz. Lower the clock speeds, be more aggressive with voltages, you can get it down to 20. Now go to 32nm, you are down to 10. Take out the L2 cache and replace it with an IMC, you just saved another 10w from the NB, basically equaling current Atom+Chipset TDP. (am I missing something here? Did I overestimate the power savings from basically 3 generations of die shrinking?)
Click to expand...

If you take a look at the datasheets of the ULV processors, power consumption of various power states have gone up since the 0.13u Pentium M. Process technology grants 30% reduction in power with same clocks. Especially at ULV levels where power consumption is low, leakage also limits TDP reduction. Core Duo has too many transistors to get it that low.

Power consumption
-You don't need to assume because the ULV CPUs are already out there. You see, the ULV CPUs on the Pentium M/Core Duo are the lowest TDP versions that exists. Think 2W is low?? Try 0.6W for the most power-sipping Atom, the Z500. Or think of Moorestown, which will bring platform-level idle power of 50mW, and half the CPU+chipset TDP at the same 45nm.

Platform, I mean by: CPU/chipset/graphics/memory/board/power control chips

BTW, I hope you stop quoting Atom platform in Netbooks. Because in MIDs, Atom has a 2W TDP with a 2.2W companion chipset. You still need to account for Southbridge on the Pentium M vs. integrated North/Southbridge on the Atom.

You are underestimating the impact of design, IMO.
 
Always puzzles me what sort of optimizations are present in laptop chips that make their TDP so low compared to desktop chips, yet performing almost the same.
 
Originally posted by: palladium
Always puzzles me what sort of optimizations are present in laptop chips that make their TDP so low compared to desktop chips, yet performing almost the same.
Click to expand...

Cherrypicking? IE - sorting chips for ULV and selling those in the lowest range into the mobile market?

Back in the days of the Pentium M it was different architecture - Intel in essence rebuilt the Pentium III on smaller manufacturing node with larger cache and low power/high performance resulted. Keep in mind that they had two development trees for a few years once it became obvious that P4 was too power-hungry/hot for mobile use. Then they merged the mobile tree back into their core architecture to produce Core 2.

P3 -> Pentium 4 -> P4 Dual ----> Core 2
-> Pentium M -> Core Duo -^
 
So to compare with: GM45 has a rated TDP of 12W.
With a CPU (with on-board NB) being rated at 45 or 55W, its really not going down as much as I expected (45/55W vs 45W, 12W-2W savings with more CPU performance.) Of course, the SB may drop some as well (is it shrinking with the P(M)55 line-up?).

Duals...ULV 18W vs 10+12W, LV 25W vs 17+12W, SV 35W vs 25+12W. New roadmaps from http://translate.google.com/tr...2F20090716_302169.html show 8 and 10W versions of the IGP (depending on voltage). Not that it matters for these SKUs, but how much GPU performance can Intel really squeeze out of 8-10W?

edit: their roadmaps also show clocks for most of the chips as well. Wonder how accurate they are. 3.33Ghz on the top mobile dual under turbo sounds...attractive.
 
So Ive read in a million different sources that Arrandale was coming out in Q4. Why does this chart have it in Q1 '10?

I also don't see the logic of going with Core i7 branding. This has got to be the worst CPU naming scheme in history. They just assign random numbers to them based on how much they feel like ripping you off. You basically pay a hundred bucks for 133mhz to go from an i5 Arrandale to an i7 one. You can get a quad core AMD Athlon for that price.

All that said, the pricing and clock speeds on Arrandale seem pretty amazing. 35w with the chipset is pretty great, especially with all the focus on idle power. I just wish they would release it already...

Also, is the only change intel is doing to Atom just adding 64bit support? Thats a huge letdown. It essentially hasn't changed since hte day it was released. (edit: oh, integrated memory controller and graphics. Seems like a decent enough upgrade I guess, as long as it can play fullscreen flash video already.)

Edit again: it seems that hte i5/i7 difference all comes down to cache. How big of a difference is this going to make in the real world?
 
Originally posted by: ilkhan
So to compare with: GM45 has a rated TDP of 12W.
With a CPU (with on-board NB) being rated at 45 or 55W, its really not going down as much as I expected (45/55W vs 45W, 12W-2W savings with more CPU performance.) Of course, the SB may drop some as well (is it shrinking with the P(M)55 line-up?).

Duals...ULV 18W vs 10+12W, LV 25W vs 17+12W, SV 35W vs 25+12W. New roadmaps from http://translate.google.com/tr...2F20090716_302169.html show 8 and 10W versions of the IGP (depending on voltage). Not that it matters for these SKUs, but how much GPU performance can Intel really squeeze out of 8-10W?

edit: their roadmaps also show clocks for most of the chips as well. Wonder how accurate they are. 3.33Ghz on the top mobile dual under turbo sounds...attractive.
Click to expand...

I think that's the point. If they lower TDP, it would decrease the potential for performance increase. You know they state in their lithography presentations that each generation brings 20% higher clock speed OR 30% lower power. They might have a bit of more advantage due to being integrated and power management being able to be finer, but performance might be the key.

I'm liking the LV Arrandale clocks. The ULV versions are amazing too.

So Ive read in a million different sources that Arrandale was coming out in Q4. Why does this chart have it in Q1 '10? I also don't see the logic of going with Core i7 branding. This has got to be the worst CPU naming scheme in history. They just assign random numbers to them based on how much they feel like ripping you off. You basically pay a hundred bucks for 133mhz to go from an i5 Arrandale to an i7 one. You can get a quad core AMD Athlon for that price.
Click to expand...

It might be the release is REALLY LATE Q4, something like early December or late November. Anyway, the PCWatch article has a ?? next to whether the naming will be i5 or i7, so let's wait how it'll be in the end.

You can say the same about i5 Lynnfield vs. i5 Clarkdale.

Man, the GPU clock speeds are pretty low if that's going to be true. 166MHz and 266MHz for LV and ULV versions?? I mean, GS45 clocks at 333MHz and GL40 clocks at 400MHz. Even with a much more potent architecture, it won't be big of a change at that speed... Hopefully its a typo.
 
Originally posted by: Idontcare

Windows still migrates the threads but the PCU does a much better job of powering down the cores rapidly in succession as the threads are migrated off of them.

Basically it is a time-domain and order of magnitude thing. Windows migrates threads no faster than the minimum timeslice which is something like 20 milliseconds whereas the PCU can power down a core (or power up a core) on the the order of microseconds.

So it is still a technical issue but is no longer a practical problem when it comes right down to the end user's experience.
Click to expand...

Yea. BTW on the Moorestown, Intel says that the full power management features won't be available on Windows(that lack of PCU thing) and needs Moblin V2 to fully exploit it. It's probably impossible to have platform-level 20mW idle power with Windows.

In order to live up to promises, Intel is going to have to bring Moorestown competitive with power consumption and size with x86 compatibility as a side order.
 
Originally posted by: drizek
I also don't see the logic of going with Core i7 branding. This has got to be the worst CPU naming scheme in history. They just assign random numbers to them based on how much they feel like ripping you off. You basically pay a hundred bucks for 133mhz to go from an i5 Arrandale to an i7 one. You can get a quad core AMD Athlon for that price.

Edit again: it seems that hte i5/i7 difference all comes down to cache. How big of a difference is this going to make in the real world?
Click to expand...

Core i7/i5/i3 name lineup

Worst naming scheme in history? Not even close. Intel's names for the Pentium 4 5 and 6 series chips was much worse. And speaking of assigning randome numbers - that's basically all AMD did with their X2 lineup for years.

If you feel like you're being ripped off just don't buy one. But please take your grumbling butt somewhere else, I'm tired of reading your crap. Is there an ignore button around here?

And regarding your final edit - cache has absolutely nothing to do with it. These chips all have the same 256K L2 cache dedicated for each core and shared 8MB L3 cache (for the quads - not sure about the duals).
 
duals are 4MB or 3MB ("harvested". That is, using a die that had a defect in a cache memory cell, I expect. As Intel has done before, it'll probably be a seperate die design at some point in the future.)
 
Originally posted by: ilkhan
duals are 4MB or 3MB ("harvested". That is, using a die that had a defect in a cache memory cell, I expect. As Intel has done before, it'll probably be a seperate die design at some point in the future.)
Click to expand...

Thanks, I had not seen anything refering to how much L3 these dualies would have. Will there be a clue in the name indicating the level of cache?
 
You must log in or register to reply here.

TRENDING THREADS

Back
Top