Zap -
Here are the facts regarding your Sempy 2600+ as you have reported them in this thread:
Box code: SDA2600BABOX
Tray code printed on processor: SDA2600AIO2BA
Stepping code: D0
64-bit capable: Yes
Between your observations of your Sempy 2600+ and from AMD via your earlier link:
http://www.amdcompare.com/us-en/desktop/details.aspx?opn=SDA2600AIO2BA
we know that processors bearing the tray code of SDA2600AIO2BA may or may not support 64-bit.
And now we know from your observations that processors that came in a box having a PIB code of SDA2600BABOX MAY support 64-bit. From doing a bit of surfing, I have found that others have made that same discovery. Your case is not unique. See:
http://forums.amd.com/lofiversion/index.php/t55733.html
With respect to:
Originally posted by: Zap
these Palermo Semprons "magically" became 64 bit capable just by some new printing on the box.
Here's my own guess as to what happened.
A manufacturing change was indeed necessary to implement 64 bit support. It was made in the fab during the period of the D0 stepping, which preceded E3 and E6. It is very possible, even likely that 64 support was available but had to be essentially unlocked. The change was made perhaps by discontinuing the cutting of a bridge or bridges by a laser? Pure speculation (with regard to bridges) on my part, but it has the implication that it might be possible to rejoin those (hypothetical) bridges on older non-64 bit Semprons to obtain 64-bit capable Semprons. But I digress - the point is that a manufacturing change of some kind was likely made at some point in time to implement 64-bit support and that transition was made during the reign of the D0 stepping.
BUT the inventory of BOXES bearing the code of SDA2600BABOX probably hadn't been exhausted at the point in time when the manufacturing change to 64-bit was made. The change was made on short notice in a scramble to react to Intel's 64-bit Celeron. Rather than discarding usable boxes, AMD just went ahead and depleted that box inventory by using them to box the 64-bit capable processors. As that supply of boxes was being exhausted, the new boxes bearing the box code of SDA2600CVBOX were being made and AMD began using them when all the "old" boxes had been used.
Or perhaps there was just a foul-up at the factory due to the fact the tray code of SDA2600AIO2BA is the same for both variants of the processor, as I mentioned in an earlier post.
My "box inventory" theory gains somewhat firmer ground if indeed the box code is printed directly on the box itself, and NOT on a label that is AFFIXED to the box. You can shed some light on that.
With regard to:
Originally posted by: Zap
Are the E3/E6 cores newer/better?
The E3/E6 cores are for sure newer and allegedly better, at least according to the following statement:
"E core revision supports SSE3 instructions and boasts slightly upgraded memory controller compared with the memory controller used in D core revision."
that appears on the following page:
http://www.xbitlabs.com/articles/cpu/display/sempron-3100e_3.html
But if AMD's processor tables can be believed, the following XbitLabs statement made on that same page,
"As for the AMD64 technology support, Sempron processors based on the E revision of Palermo core do not have it, either."
is absolutely wrong. According to the table at:
http://www.amdcompare.com/us-en/desktop/default.aspx
EVERY Sempron E core, be it E3 or E6 supports 64 bit. And I think both cores support SSE3 as well. So the E6 core may just contain bug fixes, when compared to E3.
Finally, FYI, there were actually THREE "D0" revisions/steppings (and that lends further credence to my "manufacturing change" theory):
SH-D0
DH-D0
CH-D0
and D0 appears to be unique in that multiplicity. See page 13 of:
http://www.amd.com/us-en/assets/content...e/white_papers_and_tech_docs/25759.pdf