Follow along with the video below to see how to install our site as a web app on your home screen.
Note: This feature may not be available in some browsers.
We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.
im looking at memory and im just curious what each digit represents. i know enough that if u gave me two sets i could tell you which one is better but i can't explain why. anyone know?
The closer you can get to 2-2-2-5, the faster in terms of latency it is, be reducing the number of clock cycles required to do an amount of work. But IMHO, if you aren't overclocking, timings don't really matter.
The timing of burst mode access is generally stated using this type of shorthand: "x-y-y-y". The first number ("x") represents the number of clock cycles to do the first 64-bit read/write. The other numbers are how many clock cycles to do the second, third and fourth reads/writes. An example would be "5-2-2-2", which means 11 clock cycles to do the whole burst. (Without burst mode this access would take at least 20 clock cycles: "5-5-5-5"). It is important to compare memory system timing looking at the amount of time for the full 4-access burst.
Note that all types of memory still have the latency on the first access. This doesn't go away, even with fast memory. Some people for example think that with fast SDRAM you don't need to use secondary cache, because both of them will do a burst transfer in one clock cycle (they both have burst accesses of the form "x-1-1-1"). However, the need to address the memory is still there for the SDRAM and not for the cache. This is why there is still the difference in the first number, the "x": SDRAM is at best 5-1-1-1, while cache is 3-1-1-1 or 2-1-1-1. SDRAM manufacturers confuse things further by only specifying the speed of the module in terms of how fast it will do the burst access--they talk only about the "1", and not the initial "5".
The maximum timing level that you can specify for the system depends a great deal on the kind of DRAM technology being used. Newer DRAM is organized specifically to increase the speed that it can run at; in fact in many cases speed is the only practical difference between the various kinds. For example, in most Pentium systems, regular fast page mode (FPM) memory has a burst cycle time of 3 clock cycles, while extended data out (EDO) memory will run with only 2 clock cycles. SDRAM will usually require only one clock cycle when bursting.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.