Burn-in and "CPU conditioning"

[pm]

About 4 years ago, I read a post on the Internet that basically said that if you raised the voltage on a CPU and left it for that way over night while running CPU-intensive programs, it would overclock better. The author had a detailed arguement for while this would be the case, and the description was well thought out and made sense... except that it's incorrect on one fundamental point. This post has since made it's way around the internet and it is frequently a source of debate on overclocking websites as to whether or not it's true.

The author has a website with a description and several times over the years I have contacted the author and we've had a fairly lively debate over the issue, but I have never been able to convince him that he is mistaken.

I came across another discussion of whether "burn-in" helps a CPU in the CPU forum this last week and a search on Google shows that the website with the advice on "CPU conditioning" is the first entry at Google. The author's website is here. Most of the page is pretty factual and it's obvious that the author has a decent grasp of semiconductor device physics.

The bit that I strongly disagree with is:

One effect that occurs during the actual using of the transistors is the hot-electron-degradation of the gateoxide. Hot electron degradation occurs, when electrons are accelerated to energy levels which allow them to cross the barrier of the gateoxide. The electrons would then either cross the gateoxide completely or get stuck within the gateoxide. A stuck electron would incorporate a negative charge into the gateoxide.
This degradation starts as soon as the transistor is used and will eventually lead to the failure of it. Usually, the CPUs are designed to last almost forever. If you can live without that (who wants to use a lame 500 in 20 years anyway?), you can actually make use of this degradation for your overclocking.

The fun part of this kind of degradation is, that regarding to speed, it makes 50% of the transistors in your CPU a bit worse, but the other 50% would get much better.

This is because there are two different flavours of transistors in the CMOS process, NMOS and the complementary PMOS. If your gateoxide has incorporated negative charge in it, the NMOS would get a slacker swing, the PMOS swing on the contrary, would become steeper. Thus, the PMOS usually being the speedlimiting factor, the CPU at whole, which consists of NMOS and PMOS transistors, would be able to run faster.

However, the physical effects are not yet understood completely. And that applies not only to me...

There are several problems with this section and they all stem from one misconception and that is whether hot-electrons can be trapped in the gate oxide of a PMOS device under normal operation conditions. The issue is whether electrons - which are the minority carrier in a PMOS device - could be generated in the channel and then get "sucked" into the gate oxide where they would reside adding negative charge to the gate and thus improving the Vt of the device.

The problem with this scenario is that electrons are negatively charged. In order to form and maintain an inversion layer for conduction in a PMOS device, you need a negative voltage on the gate and a positive voltage on the substrate. In this case, any electrons generated will be repelled away from the negatively biased gate and will be "sucked" into the positively charged substrate.

When I mentioned this to the author of the webpage, he cited a technical paper about embedding electrons in the gate of a PMOS device and used the results which show the benefits of hot-e on PMOS Vt, but the problem with this particular article is that the author of the article deliberately reverse biased the PMOS gate in order to create the condition. I readily agree that if electrons get trapped in the gate, that the Vt improve improving the IDsat of the gate... my issue is that the biasing on the gate on a real CPU precludes this condition outside of a labratory.

This article on this webpage is used as an authoritative source for information on "conditioning". I have tried to convince the author that he is mistaken. I think it would be a benefit to the internet as a whole if other who are knowledgeable on the subject chimed in as well. The author seems to be a reasonable person and I think that if others explained the misconception that the page might be changed.

 

[Shalmanese]

I remember you wrote an excellent post about burn-in about a year ago. I think it would be worth it for you to dig it up again.

 

[SuperTool]

It is my understanding that PMOS threshold actually degrades with time because of NBTI (Negative Bias Temperature Instability), and that holes, and not electrons get stuck in the gate oxide. I will be the first to admit that I don't have degree in semiconductor physics, but that has always been my understanding of NBTI that the PMOS's get slower due to higher |Vt|
here, found an EE times link

 

[FearoftheNight]

Its a myth I think.

 

[CTho9305]

pm's previous explanation.

 

[pm]

I guess what I was trying to say with my original post is that the website owner doesn't seem to believe anything that I say, and yet seems like a reasonable enough person. I was hoping someone else who has an understanding of device physics could take up the torch and email the webpage owner and explain why he is mistaken and push to get the page changed.

Super: I agree. BTI reduces the IDsat over time (although in my experience it saturates faster than Hot-E) by creating positively charged traps at the oxide interface raising the |Vt| over time.

 

[sgtroyer]

pm

I'm trying. I've emailed him a few times asking for evidence or journal articles or something to support his claims. So far he hasn't come up with much other than waving his hands and saying "somebody at Intel published this one paper once". If he didn't listen to you, I don't really expect him to listen to me, but I'm giving it a shot anyways.

 

[pm]

Thanks, sgtroyer. I appreciate that you are trying. You'd be surprised how many users out there on the internet use this website as a reference and a justification for overvolting (like "Well it's actually a good thing that I'm running my 1.45V processor X at 1.85V because I'm busy improving the PMOS devices in the CPU"). It would be a good thing if it was corrected - it certainly doesn't hurt to try.

 

[SuperTool]

OK, so I went to ieeexplore, and read over the G. Rosa IEEE article that this guy has as reference, and in conclusions, it clearly states that there is degradation in PMOS mobility and reduction in performance over time.
I don't even think he even read his own references, or has what it takes to understand them. I almost feel sorry for the fools following his advise.
Almost, because they could have spared themselves by reading the ATHT forum
Mostly they are just wasting time.They are going to waste a few days burning in their chip in futile attempt to speed up their chip by a few picoseconds a cycle. How about just using that time to go to work and make some money to buy a higher speed chip to begin with.
Whatever computation time they would have saved even if this burn-in worked would not be bigger than the time they waste trying to burn it in.

 

[Shalmanese]

pm: Why do you care? The more people who do this, the more chips Intel sells, the more you get paid .

Also, When we are talking about significantly slower, how much are we talking? 20% 30%? Would it be possible to get an untreated chip and take your chances and get it to run at 5Ghz+? When intel is demoing their new 5Ghz+ chips, are these treated or untreated?

 

[pm]

pm: Why do you care? The more people who do this, the more chips Intel sells, the more you get paid .

This is a joke, right? My engineering lack of sense of humor is showing through. I care because I don't like the idea of people doing harm while thinking they are doing good.

Also, When we are talking about significantly slower, how much are we talking? 20% 30%? Would it be possible to get an untreated chip and take your chances and get it to run at 5Ghz+? When intel is demoing their new 5Ghz+ chips, are these treated or untreated?

We are talking 2-6% slower.

As far as demo chips, I don't think much of anything bypasses the burn-in step in the production flow. But to be honest, I don't know.

 

[zsouthboy]

The best explanation to give people is "if this really did work, wouldn't AMD and Intel do it ahead of time, so they could get more money for the chip?"

 

[Shalmanese]

Originally posted by: pm

pm: Why do you care? The more people who do this, the more chips Intel sells, the more you get paid .

This is a joke, right? My engineering lack of sense of humor is showing through. I care because I don't like the idea of people doing harm while thinking they are doing good.

Also, When we are talking about significantly slower, how much are we talking? 20% 30%? Would it be possible to get an untreated chip and take your chances and get it to run at 5Ghz+? When intel is demoing their new 5Ghz+ chips, are these treated or untreated?

We are talking 2-6% slower.

As far as demo chips, I don't think much of anything bypasses the burn-in step in the production flow. But to be honest, I don't know.

pm: Oh, of course that was a joke, hence the .