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bitsandchipsAMD Reveals the Monsterous ‘Exascale Heterogeneous Processor’

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Fjodor2001 said:
Anyway, as I understand it research paper is not specific about what CPU and memory is to be used in an actual future product. But the final product may use a HBM successor such as HBM2, and potentially also x86 cores such as Zen (or a successor). I wonder if it was the fact that it was AMD that published the research paper that made the article in the OP make those assumptions? After all, for AMD those would be the most logical choices.
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They discarded HBM2 too, hey, it's exascale. If we had the pieces ready the companies would be designing products, and not researching alternatives.

And the article is really poorly written. Bitsandchips either wanted a click-bait or doesn't have a clue on how to read an article like that.
 
mrmt said:
They discarded HBM2 too, hey, it's exascale. If we had the pieces ready the companies would be designing products, and not researching alternatives.

And the article is really poorly written. Bitsandchips either wanted a click-bait or doesn't have a clue on how to read an article like that.
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The guy that runs Bitsandchips is a regular poster on AMDZone SemiAccurate's forums and is frequently making an idiot of himself, unintentionally.
 
AtenRa said:
yeap, you better dont read to much on those specs 😉

http--www.gamegpu.ru-images-stories-Test_GPU-Retro-The_Witcher_2_Assassins_of_Kings-test-witcher3_ram2.jpg
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the difference between Mb, MB, and MiB
 
Looks like a rehash article from the fake slides. But again, its wccftech. Clickbait.

And of course they are going back. We already know they drop CMT.
 
ShintaiDK said:
Looks like a rehash article from the fake slides. But again, its wccftech. Clickbait.

And of course they are going back. We already know they drop CMT.
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The original source is Fudzilla.

df2ae72ba22831b634d84d95a3e41f35_L.jpg


And yes, it resembles the previous Zen architecture slides.

This leads WccfTech to speculate that those slides in fact were real, as they wrote:

"A few months ago, the design schematic of Zen based processors was posted on a forum. While its authenticity was anything but confirmed, I am now beginning to suspect it was the real deal."
 
ShintaiDK said:
https://en.wikipedia.org/wiki/Clickbait

Just a rehash of the same fake stuff from April. From the same time with the other fake slides.
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Not really. It appears Fudzilla got it reconfirmed from their sources, along with some new details:

Our well informed industry sources have shared a few more details about the AMD's 2016 Zen cores and not it appears that the architecture won't use the shared FPU like Bulldozer.

The new Zen uses a SMT Hyperthreading just like Intel. They can process two threads at once with a Hyperthreaded core. AMD has told a special few that they are dropping the "core pair" approach that was a foundation of Bulldozer. This means that there will not be a shared FPU anymore.
Zen will use a scheduling model that is similar to Intel's and it will use competitive hardware and simulation to define any needed scheduling or NUMA changes.

Two cores will still share the L3 cache but not the FPU. This because in 14nm there is enough space for the FPU inside of the Zen core and this approach might be faster.
[...]
Zen will apparently be ISA compatible with Haswell/Broadwell style of compute and the existing software will be compatible without requiring any programming changes.

Zen also focuses on a various compiler optimisation including GCC with target of SPECint v6 based score at common compiler settings and Microsoft Visual studio with target of parity of supported ISA features with Intel.
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Also the slides very much match with what is expected from Zen given what AMD has been mentioning publicly. So I wouldn't be surprised if that's close to what it'll actually turn out in the end. Nothing revolutionary compared to what AMD has mentioned.
 
I do think that Zen will be way more competitive than BD derivatives were. It might end up being somewhere along the IB core performance level which should be enough to put them back into ST performance realm of latest intel core and push them ahead of mainstream/high end (4T/4T and 4T/8T) intel chips in 2016.

Intel won't be standing still though so that is why AMD already listed a Zen+ core for 2017 which appears to be a 10% bump over the previous one. All in all they should be way more competitive in sheer performance and performance/watt but FIRST they have to deliver on that.
 
Hmm, then I hope, that a recent patent application by AMD is not related to Zen as it shows an exemplary CU with shared L2, FPU, and up to 4(!) hyperthreaded (!) int cores.
 
mrmt said:
Did you look at the paper? No, you didn't, and it seems that neither did the clowns at bits and chips. AMD doesn't talk about Zen cores and in the case of the memory, they explicitly say that they will not use HBM for this concept. And they don't mention products roadmap at all.

Looks like Fuzdzilla got strong competition.
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I didn't see that in the paper. They talked about how HBM(2+) could provide the necessary bandwidth but not the capacity which is why they have a multi-level approach with on chip as well as off chip RAM. They also include the possibility of PIM for power efficiency. I read the paper quickly, but didn't see them explicitly eliminate HBM(2+) as a possibility.

I agree though that this shouldn't be taken as a product roadmap or anything, rather a glimpse of things to come as AMD sees it. Basically, this is AMD saying, if we want to build an exascale processor in 'X' amount of years, this is an outline of what it's specs would be and then uses some current technology to give an idea of where we are versus where we need to be. Obvously this research drives what products they work on, but that doesn't mean that this is what the actual architecture will look like.
 
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