Originally posted by: TStep
Can anyone explain in layman's term what exactly is the "Tape out" process. Just a week ago, the third go around had just begin and it was going to delay shipment for month's and cost millions. Now it's announced that it is a success in a little over a week's time. How can this cost millions? Is there extensive modification required in the manufacturing tools that will cost time and money following the tape out, or does that 4-5 million dollar figure include projected lost profits? Confused.
I believe the 'tape out' process is the process of making all the masks necessary for the photoresist developing. These determine the topography of the chip.
They couldn't possibly go from taping out to finished product in a week given the complexity of the chip. It most certainly takes more than 7 days from start to finish of a wafer of chips of this caliber, probably more on the order of 2-3 weeks. However, who knows how far along in the process they were when the Inq published their last article.
The 'tape out' process nowadays is simply uploading a computer file to a machine that makes the masks. I would guess that the masks aren't incredibly expensive either, but that the primary cost comes in terms of the rental of TSMC fab time, labor and resources... and the wafers themselves.
I would presume the cost of a 'tape out' estimated by the Inq in the previous article includes:
- design costs for making the new revision
- the real 'tape out' process (making the masks, etc...)
- cost of TSMC resources to make the 'test batch'
- the cost of all involved reliability and yield testing necessary for the 'test batch'
I don't know for sure, but those are my guesses.