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ATI RV870

I believe the translation said it'd be out Q1, 2009. And only 1000 shader units? I don't think so. Think 1600-2000 if they want to compete with nVidia and stay alive.😕
 
Originally posted by: FalseChristian
I believe the translation said it'd be out Q1, 2009. And only 1000 shader units? I don't think so. Think 1600-2000 if they want to compete with nVidia and stay alive.😕

SP isn't necessarily the driving force in games today perhaps tomorrow. As times go by SP does dictate more and more. Just look at GT200 that does less GFLOP than RV770 and still takes the crown.

How many SP it has doesn't necessarily mean anything. It depends on texture SP ratio. What they did to the architecture to improve pixel and texture performance, etc...

Still too early on speculating specs. take it with a grain of BS.
 
yea if they double wide the texture units from RV770 were going to see a significant performance increase over what we have currently. and thats just for starters, judging by how much extra power their card has vs nvidia (GFlop), but yet nvidia still trumps their 2.4Tflop card (or is it 2.8?), the 4870x2, with a 933Gflop card, simply because it has more texture units on board. now obviously the price to manufacture each card puts things in perspective, but the point is still there. if AMD doubles or even triples their texture units on the card were going to see a massive performance increase, especially in games where the nvidia cards are currently king because ATIs texture units cant keep up.
 
It might not be the fastest but if it has a smaller die than RV770 (205mm^2 v 256mm^2) it might be a bargain at launch, since RV770 was a good price when it was introduced.
 
Originally posted by: faxon
but yet nvidia still trumps their 2.4Tflop card (or is it 2.8?), the 4870x2, with a 933Gflop card, simply because it has more texture units on board.

I'm not sure what review you've been reading but a GTX 280 is not faster than a 4870x2.
 
Just look at 4670. Easily matching 3850 performance just because ATI added 32TMU with only 8 ROP and 128bit memory bus. I think this is what the future holds for ATI. Bigger versions of these could easily shake Nvidia in a damaging way.

I think ATI needs another 8 render backs maybe raise up their SP texture ratio by 50%. Perhaps 384bit memory bus using 768mb of GDDR5. This would easily break GT200 and then some.

Currently Gaming at 1920x1200 and 2560x1200 does take a toll with a RV770. RV770 is good but I think a lot of that GDD5 bandwidth is being wasted with 16 ROP 40TMU card.
 
Originally posted by: Azn
I think ATI needs another 8 render backs maybe raise up their SP texture ratio by 50%. Perhaps 384bit memory bus using 768mb of GDDR5. This would easily break GT200 and then some.
I dont think a 384bit memory bus is viable unless the chip is alot bigger and more expensive ie 400mm2 or something. GDDR5 i think requires more pins than DDR3 as well at the smaller process feeding all the power in is going to be difficult. The sideport thingy also requires a bunch of pins as well.

As an alternative GDDR5 comes in faster speeds than what is currently being used, maybe that will be enough for their new chip.

Look at the telsa chip nvidia just released, apparently that is a 55nm GT200 which appears to have a 384bit bus. Nvidia may be thinking along the same lines.
 
Originally posted by: rjc
Originally posted by: Azn
I think ATI needs another 8 render backs maybe raise up their SP texture ratio by 50%. Perhaps 384bit memory bus using 768mb of GDDR5. This would easily break GT200 and then some.
I dont think a 384bit memory bus is viable unless the chip is alot bigger and more expensive ie 400mm2 or something. GDDR5 i think requires more pins than DDR3 as well at the smaller process feeding all the power in is going to be difficult. The sideport thingy also requires a bunch of pins as well.

As an alternative GDDR5 comes in faster speeds than what is currently being used, maybe that will be enough for their new chip.

Look at the telsa chip nvidia just released, apparently that is a 55nm GT200 which appears to have a 384bit bus. Nvidia may be thinking along the same lines.

If they keep the 256bit bus that means they will still have 16ROP. It's about time ATI needs to raise up their ROP count. They've been on 16ROP count for more than 5 years. There's a fine line where texture SP ratio can do so much for the chip with 16ROP count. Gains would be incremental. Not much of an upgrade from Rv770.

RV770 is a lot smaller than GT200. 384 bit memory bus isn't out of the question as their high end on 40nm. ATI is on a roll with their design. They need to step up instead of going sideways.

Tesla chips are for simulation. It isn't too constraint by memory bandwidth for floating calulations. GT200 is a failure from a performance to die ratio. Nvidia needs to go back and redesign their chip.
 
Originally posted by: Azn

Just look at GT200 that does less GFLOP than RV770 and still takes the crown.
That's because those are theoretical figures; in practice the GT200 is more likely to generate more FLOPs than the RV770 because it uses a scalar architecture, unlike the RV770 using VLIW that requires more compiler optimization.
 
Originally posted by: Azn
If they keep the 256bit bus that means they will still have 16ROP. It's about time ATI needs to raise up their ROP count. They've been on 16ROP count for more than 5 years. There's a fine line where texture SP ratio can do so much for the chip with 16ROP count. Gains would be incremental. Not much of an upgrade from Rv770.
Are you sure the ROP count is directly tied to the memory controllers? I thought they kept it at 16 for DDR3 cause DDR3 was the limiting factor, with DDR5 running at double speed they could double the ROPs to 32 if they wanted without increasing the size of the memory interface. This would probably mean having GDDR5 across the board for their different models, no mainstream model with DDR3.

RV770 is a lot smaller than GT200. 384 bit memory bus isn't out of the question as their high end on 40nm. ATI is on a roll with their design. They need to step up instead of going sideways.
Yes but on 40nm dont you need a certain size chip ie 180mm2 for 256bit interface, and say 250mm2 or so for a 384 bit interface. That means > 1 billion transistors doesnt it? Alot of power in a very small space, good luck with a 384 bit interface and the power pad design, not being able to use lead solder anymore will need to spread the power over many more pads so they dont melt.

Tesla chips are for simulation. It isn't too constraint by memory bandwidth for floating calulations. GT200 is a failure from a performance to die ratio. Nvidia needs to go back and redesign their chip.
Yeah ok not as much bandwidth is required, but can they disable part of the memory interface without losing the whole cluster behind? I guess will know for sure if the upcoming 55nm GT200 gaming card has a 384bit interface.
 
Are you sure the ROP count is directly tied to the memory controllers? I thought they kept it at 16 for DDR3 cause DDR3 was the limiting factor, with DDR5 running at double speed they could double the ROPs to 32 if they wanted without increasing the size of the memory interface. This would probably mean having GDDR5 across the board for their different models, no mainstream model with DDR3.

ROP is tied to the memory controller. Why would ddr3 be limiting factor to ROP? I think you are confused more than anything else. Just because they use gddr5 doesn't mean you can raise rop count to 32.

Yes but on 40nm dont you need a certain size chip ie 180mm2 for 256bit interface, and say 250mm2 or so for a 384 bit interface. That means > 1 billion transistors doesnt it? Alot of power in a very small space, good luck with a 384 bit interface and the power pad design, not being able to use lead solder anymore will need to spread the power over many more pads so they dont melt.

Why would you need a certain size for memory bit interface? Where are you getting your information from? 😕

Anyways GT200 is 577mm with over 1.4 billion transistors. It seems to be handling 512bit memory bus doesn't it.

Yeah ok not as much bandwidth is required, but can they disable part of the memory interface without losing the whole cluster behind? I guess will know for sure if the upcoming 55nm GT200 gaming card has a 384bit interface.

Did you even mention the specs of GT200 tesla chip? You mentioned 384bit bus. I'm guessing it's 24 ROP card. SP probably disabled or redesigned.
 
Originally posted by: BFG10K
Originally posted by: Azn

Just look at GT200 that does less GFLOP than RV770 and still takes the crown.
That's because those are theoretical figures; in practice the GT200 is more likely to generate more FLOPs than the RV770 because it uses a scalar architecture, unlike the RV770 using VLIW that requires more compiler optimization.

It's all theoretical even with nvidia's hardware but then when we put it to use with a game it sure doesn't act that way. Unless all the shader games were specifically optimized for ATI SP. We can see many instances where a shader heavy games favor ATI R7XX cards.

 
Originally posted by: Azn
ROP is tied to the memory controller. Why would ddr3 be limiting factor to ROP? I think you are confused more than anything else. Just because they use gddr5 doesn't mean you can raise rop count to 32.
Currently the RV770 uses the same ROP behind the memory controller for both gddr3 and gddr5. As gddr5 provides roughly twice the data as gddr3 the ROP cant be tuned perfectly to both(unless it runs a double the clock for gddr5 case) it must be specialized for one or the other surely? I am guessing as much more gddr3 product was expected to be sold it was the 4850 that was tuned for.

Originally posted by: rjc
Yes but on 40nm dont you need a certain size chip ie 180mm2 for 256bit interface, and say 250mm2 or so for a 384 bit interface. That means > 1 billion transistors doesnt it? Alot of power in a very small space, good luck with a 384 bit interface and the power pad design, not being able to use lead solder anymore will need to spread the power over many more pads so they dont melt.

Why would you need a certain size for memory bit interface? Where are you getting your information from? 😕

Anyways GT200 is 577mm with over 1.4 billion transistors. It seems to be handling 512bit memory bus doesn't it.
I think it is called "pad limited", the chip needs so area to handle I/O cause packaging technology is not progressing as fast as process technology. The chip has to be so big other wise all the connections needed wont fit. See this 4870 Review the original chips was only supposed to have 480SPUs.

The power stuff was just my speculation, cause of the problems nvidia has had recently with their mobile parts being caused by too much watts going through the power pads causing them to fatigue crack, this with high lead solder too which will not be allowed to be used for much longer. Power pad numbers will have to go up.

Did you even mention the specs of GT200 tesla chip? You mentioned 384bit bus. I'm guessing it's 24 ROP card. SP probably disabled or redesigned.

Here: Nvidia Quadro CX
According to specs its 192 shaders and 384 bit bus...not the same proportions as the GTX260(192shaders and 448bit bus). Memory interface is reduced for some reason.
 
i don't expect much from RV870; why? because its coming out too fast and its also a die shrink, it'll be like the transition from 2xxx to 3xxx, well, a little more than that but still not like the 3xxx->4xxx transition; i don't think they'll risk doing another 2900xt
 
Originally posted by: rjc
Here: Nvidia Quadro CX
According to specs its 192 shaders and 384 bit bus...not the same proportions as the GTX260(192shaders and 448bit bus). Memory interface is reduced for some reason.

That looks like a G80 based card. At least the specs tell me it is.
 
Currently the RV770 uses the same ROP behind the memory controller for both gddr3 and gddr5. As gddr5 provides roughly twice the data as gddr3 the ROP cant be tuned perfectly to both(unless it runs a double the clock for gddr5 case) it must be specialized for one or the other surely? I am guessing as much more gddr3 product was expected to be sold it was the 4850 that was tuned for.

What are you trying to say? You have changed the subject at hand. First you were talking about how you can change ROP size with gddr3 and gddr5 memory interface now you are speculating that 4870 is tuned for gddr3 when it has GDDR5 memory Interface? 😕

RV770

I think it is called "pad limited", the chip needs so area to handle I/O cause packaging technology is not progressing as fast as process technology. The chip has to be so big other wise all the connections needed wont fit. See this 4870 Review the original chips was only supposed to have 480SPUs. The power stuff was just my speculation, cause of the problems nvidia has had recently with their mobile parts being caused by too much watts going through the power pads causing them to fatigue crack, this with high lead solder too which will not be allowed to be used for much longer. Power pad numbers will have to go up.


ATI will compensate again by raising Texture count, SP, even ROP. Kind of like what they did with RV770. I don't see what the problem is.

Who knew? Tom's hardware actually made some technical information. Here I thought they were going down hill ever since the bought out.


Here: Nvidia Quadro CX According to specs its 192 shaders and 384 bit bus...not the same proportions as the GTX260(192shaders and 448bit bus). Memory interface is reduced for some reason.

Considering memory controller isn't tied down to SIMD core I don't see what the problem is.

http://images.anandtech.com/re...200/GT200fullblock.png

This also shows memory is tied down to ROP with RV770. Same for GT200.

http://images.anandtech.com/re...deo/ATI/4800/rv770.png
 
Originally posted by: Martimus
Originally posted by: rjc
Here: Nvidia Quadro CX
According to specs its 192 shaders and 384 bit bus...not the same proportions as the GTX260(192shaders and 448bit bus). Memory interface is reduced for some reason.

That looks like a G80 based card. At least the specs tell me it is.

G80 have 192SP?
 
Originally posted by: Azn
Originally posted by: Martimus
Originally posted by: rjc
Here: Nvidia Quadro CX
According to specs its 192 shaders and 384 bit bus...not the same proportions as the GTX260(192shaders and 448bit bus). Memory interface is reduced for some reason.

That looks like a G80 based card. At least the specs tell me it is.

G80 have 192SP?

Sorry. I saw the bandwidth, and made an assumption. Never had a G80, but I could tell that the SP count was less than the GTX280 (240 SP's). I think G80 has 128 SP's, right?
 
Originally posted by: Martimus
Nordic Hardware has a similar report in English: Link

If this is true. RV870 will just a souped up version of RV770 on a 256bit bus. Barely raising SP count and raising texture SP ratio. Conservative if you ask me.
 
Originally posted by: Azn
Originally posted by: Martimus
Nordic Hardware has a similar report in English: Link

If this is true. RV870 will just a souped up version of RV770 on a 256bit bus. Barely raising SP count and raising texture SP ratio. Conservative if you ask me.

AMD didn't change texture SP ratio when they went from 670 to 770. Why would they do it now?

The article is wrong.

The overall performance is said to be around 1.5TFLOPS, which matches the first stories of a performance boost of around 1.2 times that of RV770. This points to four added shader clusters, with 40 shaders and 2 texture units per cluster, adding up to 960 shaders and 48 texture units. This was not stated in the article, but mere speculation on our part.
If the boost is 20% then it means 2 additional clusters. 770 has ten of them.
 
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