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Athlon64 .90nm Benchmarks!!!

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Good for AMD! Even had they not added the extra improvements we would have all welcomed the 90nm die shrink. This just makes it all the sweeter😀
 
Originally posted by: Alkaline5
I know the voltage reading on the Sample CPU is incorrect, but just imagine how little heat a .13v CPU would produce! No 90nm heat issue there.

Umm isnt prescott 1.3v..

and its 1.45v, not .13v, cpu-z isnt very good with unreleased chips and ES 😛
 
Originally posted by: michaelpatrick33
thanks for the answer
It has to do with improving the efficiency of writes to memory, by combining a number of small writes into a single larger write.
 
Originally posted by: Acanthus
Umm isnt prescott 1.3v..

and its 1.45v, not .13v, cpu-z isnt very good with unreleased chips and ES 😛

Originally posted by: Alkaline5
I know the voltage reading on the Sample CPU is incorrect, but just imagine how little heat a .13v CPU would produce! No 90nm heat issue there.

I was making light of the incorrect reading, I know perfectly well what the default voltage ratings are.
 
Originally posted by: Alkaline5
Originally posted by: Acanthus
Umm isnt prescott 1.3v..

and its 1.45v, not .13v, cpu-z isnt very good with unreleased chips and ES 😛

Originally posted by: Alkaline5
I know the voltage reading on the Sample CPU is incorrect, but just imagine how little heat a .13v CPU would produce! No 90nm heat issue there.

I was making light of the incorrect reading, I know perfectly well what the default voltage ratings are.

I see that now.

Wow could you imagine a p4 at 40ghz... that would be amazing.
 
Originally posted by: RaynorWolfcastle
Originally posted by: formulav8
It is good to see that AMD is not letting Intel get away with software optimization advantages like they did in the past. AMD is wasting no time now including support for Intels new SSE3 instruction set. So now, when someone optimizes their software for Intel's SSE, SSE2, and SSE3, AMD will also get a boost in performance. 🙂 Jason
It's good to see that AMD implemented SSE3, but I don't think it will benefit them nearly as much as Intel for architectural reasons (in a 1 CPU scenario anyway). From what I understand, the SSE3 instructions are mostly useful in optimizing for SMT processors like the HT-P4's. Since AMD's Opterons don't have SMT capabilities, it'll be interesting to see how much of a speed boost they'll get out of those instructions.

there are 13 new instructions in sse3. only two of those are for thread synchronization, and they don't necessarily need hyperthreading to work correctly. take a look here
 
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