TL
R
The plaintiff, Tony Dickey, was not happy with the performance of his FX-9590 and now wants to sue on the basis that "AMD’s “8-core” Bulldozer was slower than Intel’s 4-core CPU and its own 6-core CPU is that it does not have “8-cores,” but only eight module processing units with shared components."
EDIT: Should be 4 modules, not 8, but that's a direct quote from the document so I'm leaving it.
Slightly longer version:
The primary shared component in question is the FPU, while also mentioning shard cache. They show die shots of an older Phenom II core and Intel Westmere core showing how each core has it's own FPU, L1, and L2. They then show a full die shot of a Bulldozer module showing the shared FPU, shared L2, and some other shared things. Of course they don't mention that the FPU is actually 2 128-bit FMACs that can work independently or together.
Nothing is ever mentioned about the integer cores either, the way this document reads is the only calculations that ever take place are floating point. They also fail to realize cache naming is relative to the architecture, Bulldozer's shared L2 cache would be more similar to Intel's shared L3 cache and Bulldozer breaks L1 down into a couple more levels.
I believe there is slight validity and AMD should have used the "module" term more, but from a technical perspective it's obvious things were omitted to fit the agenda. I don't see any validity in this case, their primary argument of shared FPU is shaky ground at best. It's easy to look at the progression of computational processing and see the FPU isn't even a required component, even today many embedded systems don't have FPUs.
Their argument would be stronger if they focused on the shared front end components, like shared fetch/decode, but at the end of the day each module still has two independent integer cores each with their own scheduler.
Facebook
Twitter