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Discussion ARM Cortex/Neoverse IP + SoCs (no custom cores) Discussion

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It would be like how Intel would feel if ASML announced it was breaking ground on the first in a series of fabs
Not the best analogy considering how low priority their 3rd party silicon foundry business has been until more recently (and the long term outcome of that is still pretty up in the air).

A better one would be Intel announcing that they are making a move into making EUV litho machines.
 
Reading the patch, it's absolutely about the ability to switch into ARM mode.
I took a quick look at the patches and I'm still unsure. They introduce 3 new instructions:
lasrm - load Arm registers​
stiasrm - store Arm registers
sae - start Arm execution​
At this point, we can assume this is just to accelerate switch to the Arm VM which could be an HW accelerator (on chip or on card?) or a SW simulator.
I'm completely unfamiliar with S390 and know very little about KVM so I'm basically clueless.
 
I took a quick look at the patches and I'm still unsure. They introduce 3 new instructions:
lasrm - load Arm registers​
stiasrm - store Arm registers​
sae - start Arm execution​
At this point, we can assume this is just to accelerate switch to the Arm VM which could be an HW accelerator (on chip or on card?) or a SW simulator.
I'm completely unfamiliar with S390 and know very little about KVM so I'm basically clueless.

SAE looks very much like a mode switch to me. I also may have on good authority from elsewhere that it is one. 🙂
 
Active cooling in smartphones will soon become the norm...
That would be so unnecessary. 😛Hope that never happens. I'd imagine that if battery technology improved two fold, for example, they would no doubt use that reason to crank it up.

With the smaller fabrication processes, one can approach those clock speeds without a jump in power consumption, assuming the SoC designers remain sensible, rational, and refuse to keep the "more is better" mindset. On the other hand, the company's shareholders and marketing dept are always going to keep pushing "faster, faster, faster" just to remain competitive.

Beyond 3D with ray tracing and neural processing, what would be the next big power consumer? Screens have high enough resolution and brightness for HDR, so there are diminishing returns there.
 
Active cooling in smartphones will soon become the norm...

No it won't. It might become the norm for niche gaming focused phones that are overclocking / want to preserve frame rates for longer before being forced to throttle.

No mainstream phones will ever have fans. Moving parts add cost and add unnecessary points of failure, water resistance is more of a hassle, and consumers aren't going to tolerate pointless noise when phones are "fast enough" for almost everyone already.
 
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D9600 is going to approach 5GHz, most likely 4.7GHz-4.8GHz.
Bit confused why they are still using the Gelas name for C1 Pro.

I would be tempted to say that Magni was the 2025 Mali GPU based on that weird lack of acknowledging known names, that was also the codename for the RK3688 GPU back in 2025.
 
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View attachment 141498
D9600 is going to approach 5GHz, most likely 4.7GHz-4.8GHz.
So like a 10-15% improvement for 1T on Fmax alone. Nice
The 1T perf gap between ARM vs Intel doesn't seem to be shrinking much then in 2026
I also want to say, it's kinda impressive how close ARM is to Apple in IPC despite not going to the extra effort of doing stuff like a load value predictor or a trace cache lol
 
I also want to say, it's kinda impressive how close ARM is to Apple in IPC despite not going to the extra effort of doing stuff like a load value predictor or a trace cache lol
Oh but I thought you need vertical integration to make good CPUs…
/s


Never take such people seriously who say those things.
 
I also want to say, it's kinda impressive how close ARM is to Apple in IPC despite not going to the extra effort of doing stuff like a load value predictor or a trace cache lol
How do we know for certain that ARM Cores such as the C1-Ultra aren't using these features?
 
How do we know for certain that ARM Cores such as the C1-Ultra aren't using these features?
Because frankly, if they were, I doubt ARM doesn't brag about it in their architecture slides lol.
Apple is the only company that is such a consistent black box. ARM and their respective vendors, Intel, AMD, Qcomm past Oryon, even Nvidia all publish deeper dives into their architectures either at launch of technical events like hotchips or IEDM.
But sure, ig we don't know for certain. Just highly likely imo.
An equal IPC does not imply comparable power efficiency and performance per watt.
Maybe, but how much of the gap couldn't be improved by allowing their core to grow in area (physical design, not expanding the architecture)?
It's interesting, both Apple's M5 and ARM's C1 Ultra look comparable in core width (not counting the extra structures apple has) and have very similar frequencies, and yet ARM uses a much smaller percentage of area on the core logic as Apple does.
 
Because frankly, if they were, I doubt ARM doesn't brag about it in their architecture slides lol.
Apple is the only company that is such a consistent black box. ARM and their respective vendors, Intel, AMD, Qcomm past Oryon, even Nvidia all publish deeper dives into their architectures either at launch of technical events like hotchips or IEDM.
But sure, ig we don't know for certain. Just highly likely imo.
Neither Arm or Apple give a lot (if any) information about their uarchitectures. Even AMD and Intel give much less information than what they used to give years ago. Patent trolls have won that war.
 
Neither Arm or Apple give a lot (if any) information about their uarchitectures. Even AMD and Intel give much less information than what they used to give years ago. Patent trolls have won that war.
ARM deff does. Just look at their recent C1 series launch slides. Ofc, as you said, it's not nearly as much as they used to do, but they do go over the highlights. They also have some documentation that helps fill in some info. And other reviewers such as geekerwan, james alan, littletree, c&c, often fill in much of the rest.
Apple is pretty much a black box though, or has been for the past few years at least.
 
Well Canyon will take eons to get to data center, so it'll be annihilated by Florence instead.
Why the codename shift from mountains?

The last time that happened we got Cortex X, but given they just changed the branding last year I don't see any reason to change codename scheme, unless they are rebasing around a new ground up µArch?

Also I'm assuming that Florence is Zen7 EPYC?
 
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