FlameTail
Diamond Member
- Dec 15, 2021
- 4,384
- 2,757
- 106
Thats like peak perfomance, at idle it's going to be lower than that, unlike Apple Android have both A7xx and A5xx so these A5xx most of times will be used at Lower frequency, when perfomance needed soc will switch to middle cores.Here you go:
View attachment 99845
Even for peak performance that is sad.Here you go:
View attachment 99845
This just further proves that Apple has plans to use their M4 Ultra chips in their servers later. They are using M2 Ultras now but as demand grows it’s clear why M4 added SME now.Interesting that ARM just posted an article about SME as if it was only just introduced instead of years old now:
![]()
Scalable Matrix Extension (SME) for Armv9 Architecture Enables AI Innovation on the Arm CPU
The New Armv9 architecture feature offers significant performance uplifts for AI and ML-based applications, including generative AI.newsroom.arm.com
Perhaps there is some possibility that it is in a neartime roadmapped CPU core for Cortex or Neoverse.
Doubtful.Hopefully MediaTek enables SME on the X5.
Then don’t you think it’s kinda strange that ARM is hyping up SME now when no will enable this year then.Doubtful.
I said near term, but by that I meant the next 3-5 years, not X5/2024 IP.
Possibly on the V4 based on X5, but I wouldn't bet anything significant on it.
As you say it may just be ARM giving Mac devs a hand dipping their toes in to it now it's finally got hardware shipping.Then don’t you think it’s kinda strange that ARM is hyping up SME now when no will enable this year then.
Cortex A53 - 2012
Cortex A55 - 2017
Cortex A510 - 2021
Cortex A520 - 2023
Most of time it's more than 2 years.
That has 0 to do with the A520s they still use and everything to do with the 5 A720’s they scale.I haven't seen deep review of A520 but it looks good, sd 8 gen 3 crush almost all midrange in terms of battery life.
Interesting that ARM just posted an article about SME as if it was only just introduced instead of years old now:
All companies that develop ISA do publish specifications long in advance to get the community ready. Arm has been doing that for many years, at least since the introduction of ARMv8. Intel is also doing the same.Then don’t you think it’s kinda strange that ARM is hyping up SME now when no will enable this year then.
It’s not a good for ARM. Let’s write articles but wait none of the high volume CPUs will enable SME…
8 gen 3 is vice versa at heavy load it use more power and low load battery life can rival even iphone.That has 0 to do with the A520s they still use and everything to do with the 5 A720’s they scale.
Android phones typically have larger batteries than iPhones8 gen 3 is vice versa at heavy load it use more power and low load battery life can rival even iphone.
Site like Gsmarena they do measure these low load test like video streaming and browsing and 8 gen 3 is better than all previous Android flagship.
How long does it usually take from their blogpost to the relevant hardware being available for sale?All companies that develop ISA do publish specifications long in advance to get the community ready.
Once WoA takes off, we should see workstation laptops with beefier cooling and more powerful CPUs with more cores and SME will make sense in those CPUs.It’s not a good for ARM. Let’s write articles but wait none of the high volume CPUs will enable SME…
True and iPhone has low resolution. But in past even with large batteries Android flagship couldn't match iPhone onscreen tests especially browsing, but things are different with 8 gen 3.Android phones typically have larger batteries than iPhones
There was an IP announcement in June a couple of years ago, it's just generally stuck to 2nd half of May over the last 8 years.Only 3 more days left in May.
Will Cortex X5 be announced?
Windows x86 Games that use AVX2 (256 bit vector) do not work on current ARM CPUs even through emulation. This is evidently because ARM CPUs lack 256 bit SIMD vector pipelines.
I think Sarah answered this. I only will add that NEON has twice the number of registers, enough for the 16 AVX2 registers. Though that leaves you with no room for temporaries which might create complications, though nothing really blocking.Windows x86 Games that use AVX2 (256 bit vector) do not work on current ARM CPUs even through emulation. This is evidently because ARM CPUs lack 256 bit SIMD vector pipelines.
SVE2 is already there. It's unrelated with vector length.Will the addition of SVE2 extension solve this problem? What about Streaming SVE?