OK. How does the industry go about binning their cpu's?
The challenge with that question is that to effectively communicate the answer one risks writing a mini-novel in the process
So how to pare down the details without leaving out too many of the important bits?
There are two things that start at the top of the decision path hierarchy when it comes to binning - there is "known capability" and there is "desired supply", and things get tricky because of course these are distributions, not specific solitary numbers, and they are also not static...the distributions are changing in real-time.
"Known Capability" varies from chip to chip, wafer to wafer, lot to lot, fab to fab, day to day, week to week, quarter to quarter.
"Desired Supply" varies from market region to region, supplier to supplier, town to town, sales team to sales team, month to month, quarter to quarter, on the basis of internal sales goals and projections set by higher and higher levels of management on the basis of seeding and developing a demand base that will vary in time and equally so across region, countries, provinces, towns, retailers, etc. Not too mention the need to capture, characterize, and factor in the competitive element which creates the need for various promos and incentive programs.
The
known capability data are generated first and foremost for the fab's own internal tracking metrics (cycle time goals, intrinsic reliability and yield, cost/wafer reduction goals, tool uptime goals, etc). But the data is also made available simultaneously to the ex-fab entities, sales and marketing for example, who must manage the feedback loop between market consumption, inventory management, and lot-start management.
The
desired supply targets are generated from inputs across a multitude of sales and marketing teams that are spread across the globe in all markets. Their own inputs represents an admixture of "known" and "projected" needs as they are attempting to balance a supply/demand point on the curve that results in steadily progressing towards meeting key internal quarterly metrics (revenue growth goals, margin goals, inventory goals, market share goals, etc).
The
desired supply must fit within the shadow cast by the
known capability. You can't ship/sell more 3.9GHz 3770k's than you can bin out across all your wafers from all your fabs. If the desired supply of 3770k's from the fabs exceeds the capability of the fabs to create them then you have a shortfall in meeting desired supply for that SKU. No one wants that to occur.
In the ideal situation, from a supply-chain management perspective, your
desired supply is never constrained by the
known capability of the fab(s). The sales and marketing teams are free to maximize and optimize revenue objectives, margins, inventory, etc without the constraint of limited supply at any given SKU. Then they can basically price the SKUs to what the market can bare whilst making the volume numbers needed to hit an overall revenue and margin target.
At the enthusiast level this is what creates the bubble in which we exist wherein we find ourselves able to purchase lower clocked SKUs that can be overclocked the same as a higher binned SKU because both may have the same inherent
known capability (same clockspeed potential, etc).
Not everything ends up being under-binned though, naturally, there will be a fair amount of chips binned at the upper limits of their known capability.
One perception gap that does seem to persist amongst the enthusiast community is that speedbin are set by supply, not by demand. The reality is they are set by neither supply nor demand, but of course supply and demand are factored into the decision process.
The reality is that speedbins are set by a sales and marketing strategy that involves meeting a cascading series of internal financial objectives set down by the executive team. Now these objectives are obviously constrained by the immutable limits of supply. You can't sell what you can't produce, customers are finicky about buying empty boxes.
But no company wants to find themselves living hand-to-mouth having to sell every last chip that bins out on the hairy-edge upper limit of its known capability. (but the ram guys do find themselves there periodically, as does AMD, but even then it is not widescale across all SKUs, it will be limited to the very top-tier SKUs)
There is a reason the top paid folks at any given business are the ones tasked with managing the big picture as it relates to moving product, making goals, meeting targets, etc, and the folks who make the products themselves (even the managers of those folks) and the R&D individuals are not making the big bucks. It is very easy to screw up the delicate balance that is required to keep a large revenue company moving along from year to year, and it is never as simplistic a job as the armchair-CEOs like to make it out to be.
This is already getting longer than I wanted, and no doubt I've left out some important bits that I should not have glossed over, and there is a strong chance I have not given you any better an idea for how (or why) the binning occurs in the sense that you may have been looking for. But what I have described here is basically what happens at every semiconductor company regardless their market or product - be it logic, analog, memory, mems, etc.
Facebook
Twitter