I'll be handling things in the coming months. Bunch of phones to get out of the way first.
Wow. This is ridiculously obtuse.
I think you are rather mistaken there. Nehalem brought huge core changes. You are aware it implemented SMT (HT) for rather great MT performance boost? And yeah, that means changing the core from beginning to end.
/Once Ocean Cove is mass produced...!!!/Maybe I'm just too obtuse, but I believe this is called a straw man.
Another straw man.
And another.
There's that straw man again.
That would be awesome! I guess the problem would be getting performance figures for something that bears some relationship to the real world and managing to do it in an equal way on each platform.
Is there any source for that? Or where did the rumour appear?
LOL! It gets even MORE ridiculous: I was biting my tongue to keep myself from calling out your strawman only to see you turn around and throw that same word at me.
...and CatMerc answered:
I *correctly* responded to say that there is no reason why adding a bunch of I/O, like USB and PCIe would be any more costly for A12 with an external chip than it would be on an X86 chip with an external chip, because X86 still adds them via an external bus (DMI for the latest Intel CPUs). They would BOTH make up for the lack of general I/O with external devices on the rest of the board while retaining their inherent performance and efficiency advantages/disadvantages for their comparable functionality at a given performance level.
*facepalm*
LOL! It gets even MORE ridiculous: I was biting my tongue to keep myself from calling out your strawman only to see you turn around and throw that same word at me.
Ever see the guy with notoriously “stank breaf” tell someone else “yo breaf stanks” when he gets mad? Yeah: there’s a reason for that.
Strawman: an intentionally misrepresented proposition that is set up because it is easier to defeat than an opponent's real argument
This started when Denly asked...
...and CatMerc answered:
I *correctly* responded to say that there is no reason why adding a bunch of I/O, like USB and PCIe would be any more costly for A12 with an external chip than it would be on an X86 chip with an external chip, because X86 still adds them via an external bus (DMI for the latest Intel CPUs). They would BOTH make up for the lack of general I/O with external devices on the rest of the board while retaining their inherent performance and efficiency advantages/disadvantages for their comparable functionality at a given performance level.
...then you show up with some baseless and irrelevant distinction (“SOC”) which you use to try and dismiss the truth I just told you:
*facepalm*
“The functionality mentioned” was, and I quote, “6 SATA, 6-10 USBs, 2-3 screens and a few PCIe.” For X86, this I/O is all on the motherboard chipset:
...not the SOC. The rest of your posturing about “strawman” this and “strawman” boils down to you using “SOC” to refer to the X86 CPU only where I more logically assumed you were talking about Apple’s chip.
About the only place where you might think you have a point is where the latest X86 CPUs would have PCIe lanes for graphics without going through the chipset, which is irrelevant for a theoretical A12 successor-based iMac or MacBook that is relying on the integrated GPU specifically to maintain an efficiency advantage (power to performance). Considering that their current GPUs already outclass any other iGPUs, they could easily integrate a GPU with enough performance for “2-3 screens.” That isn’t a big consideration for selling iMacs and MacBooks but, who knows? Maybe it will be for future iMac Pros or something.
I think it’s weird that you specifically try to distinguish X86 CPUs as SOCs when, traditionally, ARM-based SOC have been significantly more highly integrated. Heck, some even throw RAM into the package. If anything, an Apple SOC that rivals X86 for future iMac and MacBooks would likely be even more highly integrated than a similar-performing X86 system.
iOS has some restrictions such as not allowing run time code generation. This will limit the benchmarks you can run.
Right. I’m calling him out for assuming that SOC=X86 any more than SOC=ARM, as if “SOC” is more synonymous with X86 than the various ARM SOCs out there. To be properly understood, his usage required me to share that incorrect assumption.x86 SoCs exist, and are sold very widely.
But who made the argument that adding this stuff would be more costly for A12 than for x86? I don't see that argument anywhere in your quoted posts or in this thread. . .
x86 covers quite a few different processors with quite a few different levels of integration. The most modern x86 SoCs integrate much more IO than the most modern ARM SoCs. The question was about what happens if A12 adds functionality to match.
*facepalm*
“The functionality mentioned” was, and I quote, “6 SATA, 6-10 USBs, 2-3 screens and a few PCIe.” For X86, this I/O is all on the motherboard chipset:
...not the SOC. The rest of your posturing about “strawman” this and “strawman” boils down to you using “SOC” to refer to the X86 CPU only where I more logically assumed you were talking about Apple’s chip.
Never did any such thing.
I read it as “Intel CPUs are SOCs where the functionality mentioned is integrated into the CPU itself.” because, obviously, you are saying that it has to be added to an Apple chip in the next line, which I read as “So yes, power consumption is affected when you add these to an Apple CPU.”
I disagree: if these IO are not used, a properly designed SoC won't consume more just because the handling of these IO are on-chip. And if you start using these IO then you're not measuring CPU efficiency alone any more.
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