SSE was nothing more than Intel s response to 3DNow wich was implemented in previous AMD CPUs like the K5 and K6, AMD later also implemented SSE because Intel was dominant in the X86 market, beside it s not known but K6 III was better than the Pentium 3 in Integer, it s just that the latter was quite better in FP and at the time games were massively using FP, this was reversed by the Athlon wich was better in both INT and FP thanks to its 3 ALUs design and triple issue FP pipeline while the P3 was 2 issues FP and still, only conditionaly.
I don't think I can agree with that, even as an AMD fan. SSE was (is) clean architectural move to 128bit SIMD width using new registers (obviously later extended with more ops, arguably the first SSE set was too limited, lacking integer SIMD for multimedia, which was sorely needed back then for video, and even SSE2 was usable but limited until SSSE3). It was obviously architected and planned in advance.
If anything, 3DNow! was likely reactionary - AMD saw opportunity to make a floating-point complement to the (integer-only) MMX set that they could do quickly before Intel makes one.
3DNow! may have been the first x86 floating-point SIMD but it was a hack - same hack as MMX, of course. Those extensions were better than nothing and were quickly available but their use of x87 registers was rather messy (and complicated the x86 ISA and cores) and limited the performance because just 64bit width. Less of an issue for MMX (you could process 8 INT8 values in one op), but quite a bit worse for floats (FP32 datatype so just two values processed per op).
What you say is simply incorrect.
Had Intel not made SSEx, someone else would have to. But certainly not like MMX/3DNow.
BTW, 3DNow! was not present in K5 and not even in the K6. It was one of the selling points of K6-2 and later chips. I wish K5 had MMX, in the first place...