Anandtech：Intel's Skylake-SP Xeon VS AMD's EPYC 7000

[Ryan Smith]

Okay. When will that be? Oh, and why the um . . . small database size? The review basically acknowledges that such a small database is going to lead to skewed results.

Quick update from Johan.

1) DB size is 120 mb iirc (so bigger than the size of the L3 cache on any CPU)

2) Will test with much larger dB after my vacation. However willing to bet it does not change the outcome. Bottleneck is syncing, not dram bw

 

[JoeRambo]

Quick update from Johan.

1) DB size is 120 mb iirc (so bigger than the size of the L3 cache on any CPU)

Two variables here, DB size and index size. Need to test with at least 1GB or so index sizes to have proper results.

 

[ambu]

I would like to suggest that for future testing it would be nice to try the best available software for these new platforms. In this way one could rate hardware performance without wondering about software limitations. In my opinion it would be great to change two things:
1) Kernel
Kernel 4.4.0 which was used in the testing has broken SMT scheduling topology for Ryzen processors. It was fixed in kernel 4.9.10
https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.9.10
There was also some fixes for Skylake in kernel 4.10.9 (I am not sure if it affects Skylake-SP)
https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.10.9
It might be controversial for some people but maybe the newer the better?
2) Compiler
For obvious reasons I do not suggest that compilation for AMD processors should be done using only Intel compilers. However, it would be interesting to see full potential of Skylake-SP when using Intel compilers. Many professional users which are looking for best performance would try this. I understand that in the Anandtech article limitation of time demanded some hard choices but maybe for some future testing there will be enough time to use Intel compilers. In my opinion cross comparison of Skylake-SP vs. EPYC and gcc vs. icc would be very interesting and it would allow to better compare hardware performance of these new shiny processors.

 

[DrMrLordX]

Quick update from Johan.

1) DB size is 120 mb iirc (so bigger than the size of the L3 cache on any CPU)

2) Will test with much larger dB after my vacation. However willing to bet it does not change the outcome. Bottleneck is syncing, not dram bw

Two variables here, DB size and index size. Need to test with at least 1GB or so index sizes to have proper results.

Now we're getting somewhere!

 

[Markfw]

Quick update from Johan.

1) DB size is 120 mb iirc (so bigger than the size of the L3 cache on any CPU)

2) Will test with much larger dB after my vacation. However willing to bet it does not change the outcome. Bottleneck is syncing, not dram bw

I still think that anything less than 15 gig database does not show much. How big is the Anandtech forum database ? Its still rather small compared to what I am used to I bet.

 

[LightningZ71]

While my days as a DB admin are well behind me, I can see three useful test cases for both platforms:
1) total DB size is smaller than total effective cache size. (Useful cases can include a front end dB server for a busy website that exists for a small, highly trafficked database that the website front ends for, which is uncommpn, but not unheard of)

2) total DB significantly exceeds processor caches, but the index still fits in them.

3) total DB size is massive and the resulting index file is too large for local processor caches. It can be argued that perhaps a rethinking of the index file may be in order, but it's not like it doesn't happen in practice.

Each case stresses the platform in a different way amd would be informative at least in an academic way.

 

[dark zero]

Oh my... that memory bandwidth...

It's me or AMD just muerdered Intel on their game? ... Also that confirms the help of Samsung on this process despite GloFo says they did it and the victory from the koreans against the U.S. people

 

[flash-gordon]

It's me or AMD just muerdered Intel on their game? ... Also that confirms the help of Samsung on this process despite GloFo says they did it and the victory from the koreans against the U.S. people

No, this is the super glue acting, an american invention.

Seriously, can wait to see the next revision of Infinity Fabric, truly the most interesting part of Ryzen.

 

[moinmoin]

It's me or AMD just muerdered Intel on their game?

They did, but that result you quoted should worry AMD as well: Epyc is seeing a far bigger relative performance increase by using Intel's compilers than Intel itself, while the difference with the widespread open source GCC is much smaller. How will they handle that for the time being, suggest the compiler of the competitor, or suggest the weaker performance even before it's optimized?

 

[PhonakV30]

HOLY Cow! That Memory bandwidth!

 

[Mopetar]

They did, but that result you quoted should worry AMD as well: Epyc is seeing a far bigger relative performance increase by using Intel's compilers than Intel itself, while the difference with the widespread open source GCC is much smaller. How will they handle that for the time being, suggest the compiler of the competitor, or suggest the weaker performance even before it's optimized?

They'd be crazy do suggest Intel's compiler, given that they once sued Intel over (among many things) having their compiler intentionally cripple performance on AMD processors.

 

[tamz_msc]

Speaking of databases, have there been any attempts in the world of commercial database software to increase performance by improving NUMA-awareness, like this one?

 

[ultimatebob]

Those benchmarks are awesome, but is the Epyc motherboard and CPU stable over the long term? I think that I might wait a few more weeks to find out.

I'm still having PTSD flashbacks from some horribly flaky Opteron based HP servers back in the day!

 

[raghu78]

No, this is the super glue acting, an american invention.

Seriously, can wait to see the next revision of Infinity Fabric, truly the most interesting part of Ryzen.

True. 7nm Zen 2 should bring the next version of Infinity Fabric. I am also looking forward to packaging improvements to save power and drive higher interconnect speeds. Silicon Less Integrated Module (SLIM) looks to bring benefits of 2.5 TSV silicon interposer without the associated complexity and cost.

https://www.amkor.com/go/technology/slim
https://www.hotchips.org/wp-content...1-HBM-package-Suresh_Ramalingam-Xilinx-v5.pdf
http://www.3dincites.com/wp-content/uploads/slim-swift-customer-overview-may-13-2015.pdf
http://www.semicontaiwan.org/zh/sit.../data15/docs/7_5._tsv_less_semicon_taiwan.pdf

 

[BigDaveX]

Those benchmarks are awesome, but is the Epyc motherboard and CPU stable over the long term? I think that I might wait a few more weeks to find out.

I'm still having PTSD flashbacks from some horribly flaky Opteron based HP servers back in the day!

How long ago was that? As far as I'm aware, Opteron-based hardware has had a pretty reliable reputation (outside of the TLB bug) for well over a decade now, even if the performance hasn't always been there.

Though this does indirectly bring up what's going to be the biggest obstacle for both Epyc and Skylake-SP; both are based on entirely new platforms, meaning that for any server admins who are more concerned about reliability than performance, Broadwell-EP will likely remain the platform of choice for the next year or so.

 

[dark zero]

No, this is the super glue acting, an american invention.

Seriously, can wait to see the next revision of Infinity Fabric, truly the most interesting part of Ryzen.

I don't be surprised if Samsung helped them on it too and we might see a future Exynos processor for laptops using it.

 

[crashtech]

Intel stooping to calling Epyc "4 glued-together desktop dies" is really something. I think my mouth fell open when I read it. It smacks of sour grapes to me.

 

[IEC]

Intel stooping to calling Epyc "4 glued-together desktop dies" is really something. I think my mouth fell open when I read it. It smacks of sour grapes to me.

"Stitched together" would make more sense if analogies are to be used. It's Infinity Fabric after all.

 

[moinmoin]

"Stitched together" would make more sense if analogies are to be used. It's Infinity Fabric after all.

Actually "stitched together" is what we heard first publicly from an Intel spokesperson back on June 20th in a response to this report.
"AMD’s approach of stitching together 4 desktop die in a processor is expected to lead to inconsistent performance and other deployment complexities in the data center."

 

[coercitiv]

Stitched, glued, pressed, hooked, whatever. What really got me worried was Intel quoting Wccftech as some kind of authority: that's where all the alarm bells went off in one deafening heart attack tone.

Intel went from "we're not even worried about this zen thing" to "let's talk about Zen during our new product launch".

 

[csbin]

EPYC 7601 ，TDP 180W..$4200
Xeon 8180 ，TDP 205W..$10009


SPEC CPU2006


CINT2006 Rates

AMD EPYC 7601（AVX2） 2360 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX512） 2930 HTML CSV PDF PS Text Config


------------------------------
CFP2006 Rates

AMD EPYC 7601（AVX2） 1840 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX2） 1890 HTML CSV PDF PS Text Config

 

[raghu78]

EPYC 7601 ，TDP 180W..$4200
Xeon 8180 ，TDP 205W..$10009


SPEC CPU2006


CINT2006 Rates

AMD EPYC 7601（AVX2） 2360 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX512） 2930 HTML CSV PDF PS Text Config


------------------------------
CFP2006 Rates

AMD EPYC 7601（AVX2） 1840 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX2） 1890 HTML CSV PDF PS Text Config

EPYC 7601 has the same FP throughput as Xeon 8180 with AVX2 compiler optimizations with a lower TDP (180w for 7601 vs 205w for 8180). Nice.

 

[coffeemonster]

Intel stooping to calling Epyc "4 glued-together desktop dies" is really something. I think my mouth fell open when I read it. It smacks of sour grapes to me.

the "re-purposed desktop products for server" line really got me. Like AMD only makes low grade consumer products but really wanted to get into the server market so they 'glued' 4 of these low grade consumer die's together and call it enterprise grade.

 

[BigDaveX]

One could imagine why Intel would have such sour grapes over the approach used for Epyc, considering how a decade ago their monolithic server-grade CPU was smacked down by an AMD counterpart that was just two laptop CPUs crudely slapped together and connected via a 25 year-old bus protocol... oh, wait...

 

[TheGiant]

EPYC 7601 ，TDP 180W..$4200
Xeon 8180 ，TDP 205W..$10009


SPEC CPU2006


CINT2006 Rates

AMD EPYC 7601（AVX2） 2360 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX512） 2930 HTML CSV PDF PS Text Config


------------------------------
CFP2006 Rates

AMD EPYC 7601（AVX2） 1840 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX2） 1890 HTML CSV PDF PS Text Config

So that AVX2 FP score means that intel's approach of building monster avx units doesn't work and its better to have more smaller units?