AMD's MCM Vs Intel's MCM on Nehalem...

[EdzAviator]

Everybody says its really difficult for AMD to make MCM on currently K8 architecture beacuse of the IMC...

And on the opposite side..current Intel Chips including the nxt yr's Peryn has no IMC so MCM is very effective...

The question is.........................???

How will Intel's future Nehalem make an MCM, if they will really pursue a Nehalem Octo Core using an MCM approach, due to the fact that Nehalem will have an IMC w/c will make it as difficult as AMD to make an MCM...???

But on intel's roadmap, there will be a Nehalem that will not have an IMC...is this the once that intel's gonna be using to have a MCM Octo core..??
If this nehalem is the same as current Core 2 Quads w/c is a dual Dual Core, then would it need a very big die to make a Dual Quad Core (Octo Core) based on a dual Dual Core (Core 2 Quad)...???

Comments pls....I need answers.....

 

[mendocinosummit]

I thought Nehalem was a native quad core.

 

[zsdersw]

Nehalem will be native quad-core, and will go native octo-core likely after the switch to 32nm.

 

[EdzAviator]

Originally posted by: mendocinosummit
I thought Nehalem was a native quad core.

yes nehalem is a native quad...but when going into the octo core arena...how will intel make it..?? I'm sure before they jump to native octo core, MCM will be the 1st approach just like MCM on Pentium D before Core 2 Duo arrived....and MCM on Core 2 Quad before Nehalem will arrived...

Pentium D & Core 2 Quad are quite easy to MCM because the FSB is in the northbridge, there is no IMC like the K8 in AMD...

The point is how will intel create an MCM Octo Core out of a dual native quad nehalem design..??

Are they gonna use the nehalem with IMC or the entry level nehalem w/c has no IMC..??

 

[sutahz]

This question is good but way too technical in my opinion. The average user isnt going to know how these technologies (IMC & MCM) are implimented, utilized and opimized in the world today, let alone how intel or amd will do it in the future.
To answer your question 'How is Intel going to do all this?", hopefully w/ the same skill and expertise as the relase of Core2 and not the horrid disaster that is P4.

 

[Phynaz]

Originally posted by: EdzAviator

Originally posted by: mendocinosummit
I thought Nehalem was a native quad core.

yes nehalem is a native quad...but when going into the octo core arena...how will intel make it..?? I'm sure before they jump to native octo core, MCM will be the 1st approach just like MCM on Pentium D before Core 2 Duo arrived....and MCM on Core 2 Quad before Nehalem will arrived...

Pentium D & Core 2 Quad are quite easy to MCM because the FSB is in the northbridge, there is no IMC like the K8 in AMD...

The point is how will intel create an MCM Octo Core out of a dual native quad nehalem design..??

Are they gonna use the nehalem with IMC or the entry level nehalem w/c has no IMC..??

Who ever said Intel will be using a MCM on any Nehalem cpu?

 

[bfdd]

You're assuming they're going to do MCM on the Nehalem they could very well make native octo-cores. Although if they were going to do MCM, they could probably just disable one of the IMCs, then have another Quickpath Interconnect between cores to the IMC so they could all access the memory controller.

 

[imported_seferio]

How can MCM with AMD be difficult at all? To me I think about it like this, if AMD can make a dual socket system they can easily do MCM. All they have to do is create the HT links to connect the two die on a single package. Possibly that could be a difficult task but with Intel going the same route as AMD with Nehalem they will have to do exactly the same thing.

 

[Aluvus]

Originally posted by: seferio
How can MCM with AMD be difficult at all? To me I think about it like this, if AMD can make a dual socket system they can easily do MCM. All they have to do is create the HT links to connect the two die on a single package. Possibly that could be a difficult task but with Intel going the same route as AMD with Nehalem they will have to do exactly the same thing.

AMD's architecture (for both K8 and K10) gives each die its own integrated memory controller. In a multi-socket configuration, each processor (that is, each physical socket) is connected to its own bank of RAM. In consumer setups, this is not as palatable (users cannot just buy 1 stick of memory, say).

I am not familiar with any of the technical details of how they intend to overcome this for the MCM 8-core Montreal that they are supposedly going to release, nor have I actually seen a definitive statement (just the Inq and Fudzilla) that it will be an MCM part.

 

[ViRGE]

Originally posted by: Aluvus

Originally posted by: seferio
How can MCM with AMD be difficult at all? To me I think about it like this, if AMD can make a dual socket system they can easily do MCM. All they have to do is create the HT links to connect the two die on a single package. Possibly that could be a difficult task but with Intel going the same route as AMD with Nehalem they will have to do exactly the same thing.

AMD's architecture (for both K8 and K10) gives each die its own integrated memory controller. In a multi-socket configuration, each processor (that is, each physical socket) is connected to its own bank of RAM. In consumer setups, this is not as palatable (users cannot just buy 1 stick of memory, say).

I am not familiar with any of the technical details of how they intend to overcome this for the MCM 8-core Montreal that they are supposedly going to release, nor have I actually seen a definitive statement (just the Inq and Fudzilla) that it will be an MCM part.

To add to that, current consumer chipsets aren't designed to HT link to two processors, you can't just split HT lanes, at the very least they'd have to add some kind of HT bridge to the package, if not require a new chipset and socket altogether. Then there's the issue of memory; if each die gets its own memory bank, then AMD may be able to get away with splitting each memory channel to each die, but I'm not confident that this is possible. It's more likely that they'd need a new motherboard design. To be fair, Intel had to solve some of these issues with their MCM design too, but most of their issues were solved long ago when they designed the GTL+ bus for the Pentium Pro.

Getting back to the subject at hand though, we know little about Nehalem or QuickPath. All we know is that QuickPath is supposed to be like HyperTransport, but beyond that we have no idea what differences there are. Intel could very well have made some design choices that make MCM designs easier.