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AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

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Asterox said:
What you do not understand, or it is preferable that you are quite confused, or what is possible or realistic impossible?

- AMD Zen "FX-9100" 8 Cores/16 Threads, 3.1ghz, TDP 95W, Samsung 14nm

- Intel i7 6900K 8 Cores/16 Threads, 3.2ghz, TDP 140W, Intel 14nm

Why this Intel CPU does not work at 3.5GHz, and what would actually be the TDP on that CPU operating frequency?😀

In the end what to write, yes AMD is again marching with "More Cores" no doubt.😉
Click to expand...


This is an early ES, with probabily pumped Vcore... First batch of a new architecture on a new process... For comparison, Bulldozer had 2.6-2.8 GHz 125W ES, and we all know the final clocks...
Stop asserting that these will be final clocks...

On 28nm BULK and 65W total TDP AMD managed to put 4 core at 3.8/4.2GHz plus a 512SP 800/1108MHz GPU, and now on a 14nmFF it should not manage to put 8 core at 95W at more than 3.2GHz? Come on... This is even possible on the shitty 28nm BULK...
 
This is getting funnier by the day: people act disappointed by an AMD 8c/16t @ 3.1Ghz+ with a TDP of 95W. If AMD truly delivers on both power consumption and IPC promise, they have a product that can stand by Intel's 6900k and not look silly from both performance and power usage standpoint. That would be the equivalent of AMD landing on the moon.

Let me remind you what we've been debating for months now: it's not whether Zen can push past 3.3Ghz @ 95W, it's whether it will deliver the baseline claims at all. Because if it does deliver both 3.1-3.3Ghz @ 95W and "40%" ST IPC + decent SMT implementation, the product is competitive from the start, even with initial crippled overclock potential (say 4Ghz hard limit because reasons).

Keep this in mind: +/- 200Mhz stock clocks will not make or break this product. Efficiency relative to competition will.
 
coercitiv said:
This is getting funnier by the day: people act disappointed by an AMD 8c/16t @ 3.1Ghz+ with a TDP of 95W. If AMD truly delivers on both power consumption and IPC promise, they have a product that can stand by Intel's 6900k and not look silly from both performance and power usage standpoint. That would be the equivalent of AMD landing on the moon.

Let me remind you what we've been debating for months now: it's not whether Zen can push past 3.3Ghz @ 95W, it's whether it will deliver the baseline claims at all. Because if it does deliver both 3.1-3.3Ghz @ 95W and "40%" ST IPC + decent SMT implementation, the product is competitive from the start, even with initial crippled overclock potential (say 4Ghz hard limit because reasons).

Keep this in mind: +/- 200Mhz stock clocks will not make or break this product. Efficiency relative to competition will.
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If they can deliver >3.2GHz with min 140% IPC of XV @ max 95W, it's like Conroe by AMD.

Their Turbo tech is what is going to be make or break this product IMHO. Can they push +500MHz ST? Because the budget will DEFINITELY be there IF the process is fine.

Sent from HTC 10
(Opinions are own)
 
Windows 2008 Server being used (if that is accurate) is a pretty clear sign that this result was not done on a Zeppelin based product 😉
Most likely it was done on C32 / G34 ES Opteron parts, in 2P config.

Also since the "Blenchmark" acquires (cpuinfo.py) the CPU name string (which is "AMD Engineering Sample" in this case) from Windows registry (Hardware\Description\System\CentralProcessor\0 \ "ProcessorNameString") it tells that this is no Zeppelin of any kind either.
The name string which gets copied into this registry entry comes from CPUID registers. On Zeppelin based parts it is "AMD Eng Sample:" instead of "AMD Engineering Sample", as we've seen on in AOTS and Geekbench leaks.
 
KTE said:
Their Turbo tech is what is going to be make or break this product IMHO. Can they push +500MHz ST? Because the budget will DEFINITELY be there IF the process is fine.
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Even if the process tech fails them in the sense of limiting overall oc potential or turbo clocks for poorly threaded apps, IF the product still delivers baseline claims in the 3.3Ghz territory (perf&power) it will be in a good place, albeit not so tempting for enthusiast consumers.
 
coercitiv said:
Even if the process tech fails them in the sense of limiting overall oc potential or turbo clocks for poorly threaded apps, IF the product still delivers baseline claims in the 3.3Ghz territory (perf&power) it will be in a good place, albeit not so tempting for enthusiast consumers.
Click to expand...
What I mean is, Turbo makes the chips more appealing right from the top of the line straight down to the bottom by making them more competitive at any given price bracket straight out of the box. In most of the chip markets, that's all that counts. Default performance.

No one cares how they achieve it. Whether it's boosting 100MHz or 1000MHz. It's the power and end total performance that sells.

Only minority enthusiasts look into the deeper aspects and OC.

Sent from HTC 10
(Opinions are own)
 
EDIT: can't find the post anymore.

You are underestimating the clock potential...

Bulldozer has at most a 20 stage integer pipeline (it's unknown, but there is an upper limit) and still manage to get 4.3GHz on the shitty 28nm BULK with HDL low power and low max clock libraries.
Zen has a 19 stage integer pipeline (official statement) and will be produced on a 14nm FF process... More conductance. Less leakage. Why on the earth it should clock lower?
 
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AMD said pipeline was around 16 stages ( i assume int pipeline), miss predict is 20-22 cycles which is what makes people think it had around 20 stages.
 
bjt2 said:
You are underestimating the clock potential...

Bulldozer has at most a 20 stage integer pipeline (it's unknown, but there is an upper limit) and still manage to get 4.3GHz on the shitty 28nm BULK with HDL low power and low max clock libraries.
Zen has a 19 stage integer pipeline (official statement) and will be produced on a 14nm FF process... More conductance. Less leakage. Why on the earth it should clock lower?
Click to expand...
I think you've quoted the wrong person...

Sent from HTC 10
(Opinions are own)
 
itsmydamnation said:
AMD said pipeline was around 16 stages ( i assume int pipeline), miss predict is 20-22 cycles which is what makes people think it had around 20 stages.
Click to expand...
19 stages according to David Kanter@MPR is the number I know.

BTW, power efficient pipelines might also have some more stages than just 5, as this gives more gating opportunities and overall can run at a lower voltage at iso frequency (one has to do less per stage). This increasingly gets offset by the latches. It always depends.
 
itsmydamnation said:
AMD said pipeline was around 16 stages ( i assume int pipeline), miss predict is 20-22 cycles which is what makes people think it had around 20 stages.
Click to expand...

Are you referring to Bulldozer, right? So Zen has even longer pipelines... 🙂

KTE said:
I think you've quoted the wrong person...

Sent from HTC 10
(Opinions are own)
Click to expand...

Excuse me... I read the post, update the page and blindly clicked on reply... Can't find/remember anymore who was quoting... Maybe he deleted the post...

Dresdenboy said:
19 stages according to David Kanter@MPR is the number I know.

BTW, power efficient pipelines might also have some more stages than just 5, as this gives more gating opportunities and overall can run at a lower voltage at iso frequency (one has to do less per stage). This increasingly gets offset by the latches. It always depends.
Click to expand...

Probably he was referring to Bulldozer. 19 stages we can give as certain, as there is a paper in the wild...
 
CHADBOGA said:
Interesting thread.

Good to see the Internet Strongman is back and laying down the smack over there.
Click to expand...

I hope your not referring to that Jaun particular guy... 😀

I like that thread, I bounce back and forth between these two quite a lot, best two sources for Zen info on the web hands down.
 
Doom2pro said:
I hope your not referring to that Jaun particular guy... 😀

I like that thread, I bounce back and forth between these two quite a lot, best two sources for Zen info on the web hands down.
Click to expand...

He is one of the greatest minds I have ever encountered and his insights into semi-conductors is beyond peer.

I love him.
 
itsmydamnation said:
AMD said pipeline was around 16 stages ( i assume int pipeline), miss predict is 20-22 cycles which is what makes people think it had around 20 stages.
Click to expand...

Those BMPs are way too high 😉

Edit: Are we even talking about 15h in general or Zeppelin?
 
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Anything positive about Zen before launch is to be taken as false given how Polaris turned out. So yeah the best option is to wait for final product reviews.
 
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