I know that it does not work so. I was only supposing that with XFR the binning can also be done this way. Could you say that this is impossible?
It's possible, yes. IMO.
But Vt 'binning' is never done. Those chips consumers see as 'high leakage', they are way too hot on current to validate on most MBs.
If you mean intentional Vt variation among transistors, that's a different topic altogether and not what is referred to as 'high/low leakage chip'.
That is also what I said, but you keep forgotting and mocking me. I said that maybe 4GHz will not be reached at launch but after some months.
I don't mock you. I mocked your repetitive assertions because they were adrift of reality.
You were claiming 4-4.5GHz for launch under 95W, and theorizing more is possible due to the Neon FPU on 14nm test vehicle. Then you extrapolated that to EXC max clock and added the gains on top. Plus the >BDe level IPC and better than BDe power.
I have those posts saved
Clocks after some tuning is when I said that it is surely possible but certainly not for launch under 95W. You always hit a knee-jerk reaction on this, until now.
It's been shown that Samsung's process is inferior on every metric to Intels original nontuned 14nm in 2014. Just imagine Intels process right now in 2017, but you still kept promoting without data how AMD will easily beat those IPC x Clocks@Power. I kept trying to explain to you it's a seesaw, but then gave up after you would ignore answering pertinent questions, providing data or discussing actual historical trends and data.
Walls of texts on repeat doesn't reinforce an erroneous point.
Neither does playing tag team.
LVT transistors have high leakage than RVT and HVT transistors, so your statement is incorrect. LVt means low Vt and so on.
The problem is that you can't guarantee exact Vt and so leakage for a given transistor.
That linked is about transistor level not chip level.
These trannys are used in different areas depending on if it is in the critical speed path or power critical, they pose different benefits. HVT allows lower power but slower delay. LVT allows the converse. I don't disagree with any of that. If you search back I explained these same points months ago on here.
Zen is looking better than all initial indications (I predicted 3-3.4GHz all core max, SNB-HSW level average) but it is still not a known if it performs IVB level in average, worse, better, or IVB-KBL level. It is also an unknown if those TDP figures mean anything close to power draw under full load.
IF today benchmarks start leaking Ryzen to be SNB-HSW level then its still a major engineering achievement to catch up on the +60% deficit. Might not be competitive past the mid-range, but doesn't mean it's anywhere close to Bulldozer.
As for Passmark, I really wouldn't go off it too much. It has too many variables able to cause variations which skew comparisons.
But I will say, I dislike anyone trying to save face backtracking\euphemisming on lengthy claims after they realize how incorrectly exaggerated they were for months, now that reality is hitting home.
It's intellectual dishonesty and I expect you to not take this route.
It's better to live and learn, but take a measured approach for the future processor releases.
Sent from HTC 10
(Opinions are own)
