AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[DrMrLordX]

Man I wish the multiquote dingus was working right now.

Anyway, $500 for the 1800X is exactly what AMD needed to do. I think the 65W 1700 will be fully overclockable, you may just need more power/voltage to achieve the same clocks as an 1800X. Also, there is the possibility that the 1800X is a high-leakage bin, which has interesting implications.

Good job AMD for getting the prices right. Intel better wear a cup, it's gonna get ugly.

 

[beginner99]

I dont understand - so you expect an igpu to help 2 years down the line with gaming in systems with 1080ti like gpu perf running a 4c 8t vs 8c 16t system?

I'm saying it's possible with dx12 multi-adapter and there have been demos from MS and Unreal engine 4 back in 2015. This gave a 10% fps increase with iGPU which was doing post-processing.

One could also imagine running physics on iGPU. Will it happen? No idea. Will it be better than more cores? No idea. Will games actually benefit from 8 cores in 5 years? No idea. There is no guarantee as well.

 

[CatMerc]

The 65W TDP can hide a culprit. The silicon quality is extremely variable. There are high leakage parts and low leakage parts. Some articles points to the fact that the new 14nm is not much worse than older processes in this aspect. But it is somewhat noticeable. And have conseguences: high leakage parts are the one in which the mean Vt of the transistors is lower. This means that at same Vcore will go higher in frequency. And usually they will overclock higher, also. This means also that at high TDP they are better than lower leakage chips. Where they don't shine is lower clock zone, because of high leakage.
Low leakage chips instead are best for low clocked chips, but do not overclock well.

In short: low TDP chips are probabily low leakage chips, that, having higher mean Vt, will clock less, but will be cooler at low frequency.

Polaris does exhibit very high variability in terms of leakage, far more than Pascal on 16nm, as can be observed by collecting the data from various reviews over time and and looking at all the Polaris and Pascal based non-desktop parts.

It would not surprise me if Ryzen, based on the same process, also has high variability.

 

[cytg111]

... Why bother with the 91W TDP rating on top i7 when many will take it past 120W at will? Every CPU needs a TDP rating for their stock config, I thought we we past that on the forums.

btj2 allready filled the blanks for me, thank you anyway.
Do feel free to put me on ignore, I dont want my stupid dragging you down .

Could be single core turbo though?

And single core turbo@4 isnt shabby at all.

 

[lolfail9001]

Polaris does exhibit very high variability in terms of leakage, far more than Pascal on 16nm, as can be observed by collecting the data from various reviews over time and and looking at all the Polaris and Pascal based non-desktop parts.

It would not surprise me if Ryzen, based on the same process, also has high variability.

That is reasonable enough, now that i recall the ridiculous variance of Polaris leakage.

 

[coercitiv]

Do feel free to put me on ignore, I dont want my stupid dragging you down .

My apologies if I came off as (too) arrogant.

 

[krumme]

I'm saying it's possible with dx12 multi-adapter and there have been demos from MS and Unreal engine 4 back in 2015. This gave a 10% fps increase with iGPU which was doing post-processing.

One could also imagine running physics on iGPU. Will it happen? No idea. Will it be better than more cores? No idea. Will games actually benefit from 8 cores in 5 years? No idea. There is no guarantee as well.

Try gaming bf1 mp 64, operations, saint quintins scar, on sector 3 and 4 there will be cluster f... situations where even a hsw 4.4 4c 8t get dips under 40 fps. And thats even on an older engine.
Its defining experience when its there. Granted its very few situations and limited maps but the problem is there.
10% better gpu gets you nowhere.
Gaming cpu load can improve with dx12 and more cores. Ipc and max freq is at a very steep wall.
I am 100% sure that i get 8c next time for those 0.1 situations. It will last and the most safe bet for 6 years investment. And last with a ps5 that will certainly run some sort of zen.

 

[Abwx]

The 65W TDP can hide a culprit. The silicon quality is extremely variable. There are high leakage parts and low leakage parts. .

Finfet have very low leakage, let s say that an extremely leaky finfet transistor is still way less leaky than a minimaly leaky fet planar transistor, FI 14nm LPP leakage is on average 3.5-4x less leaky than GF s 28nm SLP wich is a low power process, and 6-7x less leaky than the 28nm HPP that is used for Kaveri.

So it s unlikely that leakage is what detemine the binning, more surely that it s the transconductance, wich is quite variable with finfets and wich is a first order parameter when it comes to frequency, that is the separation metric.

 

[KTE]

I think that this is not the case, and i try to explain why.
Until now the process of CPU binning was stochastic. You suppose that the dices near the center are faster, then try it to see if they work and then package.

But now AMD has implemented a very powerful technology: XFR. I think that it can be used for precise binning. How? Cut the chip, package it, put an air cooler, make it run a standard power virus load (EG multithreading prime 95 like), in a controlled environment (EG: a 35C room) on 8c, 6c 4c CCX0 and 4c CCX1.

That's not how CPU stability testing works.

That's not how CPU binning works.

Lol at Prime95. I think you have an awesome imagination.

It's impossible, because 14nm is a low power process and moreover i would be right... So it's impossible.

It's not impossible... just not for launch base at 95W as you kept hyping.

The 65W TDP can hide a culprit. The silicon quality is extremely variable. There are high leakage parts and low leakage parts. Some articles points to the fact that the new 14nm is not much worse than older processes in this aspect. But it is somewhat noticeable. And have conseguences: high leakage parts are the one in which the mean Vt of the transistors is lower. This means that at same Vcore will go higher in frequency. And usually they will overclock higher, also. This means also that at high TDP they are better than lower leakage chips. Where they don't shine is lower clock zone, because of high leakage.
Low leakage chips instead are best for low clocked chips, but do not overclock well.

In short: low TDP chips are probabily low leakage chips, that, having higher mean Vt, will clock less, but will be cooler at low frequency.

This all sounds like Fudzilla crap.

Vt has nothing to do with high/low leakage chips.

High leakage isn't a technical engineering term but just due to the fact that they are very high power consuming chips at binnable frequencies. They don't make the 'bin' due to high power after the 'Class Testing' stage.

So they require a low voltage but high current for the same frequency as a standard chip.

They're NOT run on separate lines for a difference in Vt. They're parametric oddities in terms of power.

Hence they have a high Ioff but a high Ion too.

Sent from HTC 10
(Opinions are own)

 

[coercitiv]

lol - no 8c 65W part apparently - this is spinning out of control

If you're on the hype train already... at least make sure them seat belts are fastened.

 

[bjt2]

Finfet have very low leakage, let s say that an extremely leaky finfet transistor is still way less leaky than a minimaly leaky fet planar transistor, FI 14nm LPP leakage is on average 3.5-4x less leaky than GF s 28nm SLP wich is a low power process, and 6-7x less leaky than the 28nm HPP that is used for Kaveri.

So it s unlikely that leakage is what detemine the binning, more surely that it s the transconductance, wich is quite variable with finfets and wich is a first order parameter when it comes to frequency, that is the separation metric.

Yes, my reasoning was on the Vt, that highly influence transconductance, but also leakage. if leakage is low, obviously this variability does not matter much and the transconductance will dominate the variability. Anyway on lower TDP the leakage is more important.

 

[LTC8K6]

lol - no 8c 65W part apparently - this is spinning out of control

Does that necessarily make the SKU list incorrect, though?

 

[PPB]

Try gaming bf1 mp 64, operations, saint quintins scar, on sector 3 and 4 there will be cluster f... situations where even a hsw 4.4 4c 8t get dips under 40 fps. And thats even on an older engine.
Its defining experience when its there. Granted its very few situations and limited maps but the problem is there.
10% better gpu gets you nowhere.
Gaming cpu load can improve with dx12 and more cores. Ipc and max freq is at a very steep wall.
I am 100% sure that i get 8c next time for those 0.1 situations. It will last and the most safe bet for 6 years investment. And last with a ps5 that will certainly run some sort of zen.

I dont know because waiting for op matches is not my thing, but cq64p at amiens duren intense fights when evrrything is already destroyed (buildingd etc) , i dont go below 60fps on a fixed 4ghz 4790k.

In my book amiens poops on the cpu more thsn st quentin scar around the mill between E-D or in B looking at the city from above

Sent from my XT1040 using Tapatalk

 

[bjt2]

That's not how CPU stability testing works.

That's not how CPU binning works.

Lol at Prime95. I think you have an awesome imagination.

I know that it does not work so. I was only supposing that with XFR the binning can also be done this way. Could you say that this is impossible? And I say prime95 like. Not prime95.
At least I have imagination... You can only LOL to my affirmations.

It's not impossible... just not for launch base at 95W as you kept hyping.

That is also what I said, but you keep forgotting and mocking me. I said that maybe 4GHz will not be reached at launch but after some months. But it's useful to hide that to mock me and spreading FUD on AMD CPUs...

This all sounds like Fudzilla crap.

Vt has nothing to do with high/low leakage chips.

LVT transistors have high leakage than RVT and HVT transistors, so your statement is incorrect. LVt means low Vt and so on.
The problem is that you can't guarantee exact Vt and so leakage for a given transistor.

High leakage isn't a technical engineering term but just due to the fact that they are very high power consuming chips at binnable frequencies. They don't make the 'bin' due to high power after the 'Class Testing' stage.

So they require a low voltage but high current for the same frequency as a standard chip.

They're NOT run on separate lines for a difference in Vt. They're parametric oddities in terms of power.

Hence they have a high Ioff but a high Ion too.

Sent from HTC 10
(Opinions are own)

Here there is so much confusion (where instead the matter is simple), that i will not even try to reply... My explanation was clear.

 

[Magic Hate Ball]

Does that necessarily make the SKU list incorrect, though?

Well somebody, or everybody, is lying...

 

[zinfamous]

Does that necessarily make the SKU list incorrect, though?

the leaked "SKU list" mentions that the lowest tier 8c/16t (1700, I think they called it?), is a 65W TDP. IIRC, the leakers also claimed that the SKU list would be the release chips, so someone or everyone is wrong here about at least one or two things.

 

[inf64]

Someone at reddit claims the 1700(no X) is 8C/16T 3.1Ghz base and 3.7Ghz max Turbo SKU. Fits well with 65W bracket.

 

[Glo.]

Most likely its Canard PC who is wrong. 3 different sites have THE SAME SKU list. And ALL OF THEM list 8C as 65W TDP CPU.

 

[CentroX]

Most likely its Canard PC who is wrong. 3 different sites have THE SAME SKU list. And ALL OF THEM list 8C as 65W TDP CPU.

just 20 more days until we know for sure. AMD isn't going to give us any more info until NDA is up.

 

[krumme]

I dont know because waiting for op matches is not my thing, but cq64p at amiens duren intense fights when evrrything is already destroyed (buildingd etc) , i dont go below 60fps on a fixed 4ghz 4790k.

In my book amiens poops on the cpu more thsn st quentin scar around the mill between E-D or in B looking at the city from above

Sent from my XT1040 using Tapatalk

Yeaa but operations is very much different cpu load from conquest. There is far more often a concentration of people the same place because of the rush nature of operation that is if you are on teams that go for the win and not kd.

Eg saint quentins scar the church (sorry think its sector 4), often there is 55 people 3 tanks and 4 planes going for the same few m2. Add a baloon crashing on top and it goes crazy

On op in amiens the load seems generally better because people is spread more out.

You will have a few cluster f... situation on cq but nothing that resembles what can happen in op saint quintins scar. Its a bit special but its there. Unfortunately its what i play so i have to fork out for some new gear. I am totally obsessed with this trench gaming in op mode. Wish there were more than the first 3 sectors of saint q scar.

 

[coercitiv]

Does that necessarily make the SKU list incorrect, though?

Nope, it just means we're getting conflicting reports.

 

[CentroX]

Some dude over at hardocp forum claim he got some small insider info that it takes a highly overclocked i7 2600k to keep up with ryzen and thats its IPC is good. There are some other shortcomings that apparently will be adressed in zen+.

Also Motherboards have bugs right now but will be fixed with bios updates.

 

[JDG1980]

Polaris does exhibit very high variability in terms of leakage, far more than Pascal on 16nm, as can be observed by collecting the data from various reviews over time and and looking at all the Polaris and Pascal based non-desktop parts.

It would not surprise me if Ryzen, based on the same process, also has high variability.

Was the variability of Polaris due to the inherent nature of the process, or was it because GloFo just hadn't ironed out the kinks yet?

 

[JDG1980]

Some dude over at hardocp forum claim he got some small insider info that it takes a highly overclocked i7 2600k to keep up with ryzen and thats its IPC is good. There are some other shortcomings that apparently will be adressed in zen+.

Also Motherboards have bugs right now but will be fixed with bios updates.

If this comparison refers to the top Ryzen SKU, it would be very disappointing. If AMD needs a 8C/16T chip to catch up to a 4C/8T chip from 2011, they would still be many years behind. We were led to expect Broadwell-E level performance. Overclocked 2600K will have a slight clock speed edge but it should be no more than about 500 MHz. The top Ryzen SKU with a 4.0 GHz boost clock should annihilate it across the board. If it doesn't, there is something badly wrong.

And given the delays we've seen, I would expect the motherboards to be flawless from day 1. They've had enough time to get it right. No more half-baked releases!

 

[Abwx]

Vt has nothing to do with high/low leakage chips.

High leakage isn't a technical engineering term but just due to the fact that they are very high power consuming chips at binnable frequencies.

Lol, total non sense and an aknowledgement that you dont even know what you are saying...

Leakage is proportional to voltage threshold, the lowest the threashold the higher the leaking current, that is, the device is closer to full conduction (when switched off) and that s why it will switch faster once driven by the full rail voltage.

From 0V up to the Vth the curent in the device increase quasi exponentialy (actually a polynomial of degree 4-5), the exact leakage is characterised by this subthreshold slope wich is measured in mV/decade, that is, the voltage delta that induce a current 10x bigger, the steeper the slope the lower the leakage knowing that there s no possible miracle in physics.

At Vth and above the transistor conduction (in function of the drive voltage) has converged to a square law out of the previous exponential law..

Anyway keep demonstrating that you understand nothing to semiconductor physics and are actually just making fool of yourself in front of whom understand those issues, of course people who are not aware of the physical principles could be led to think that you could be right, but i guess that my post will expose you for what you are, that is, someone who s deliberatly trying to mislead people using false technical statements...

Insulting other members is not allowed.
Markfw
Anandtech Moderator