AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[ultima_trev]

I'm praying to the silicon gods that the all core turbo will be 3.7 GHz and an OC in the 4.2 - 4.4+ GHz range is possible. I pray the 6 core / 12 thread version performs on par with an i7 5820K or i7 6800K at similar clocks and is priced significantly lower. I pray that the hex core Zen won't bottleneck a highly OC'ed GTX 1080. The i5 6600K (even with a 4.5 GHz OC) is starting to show its age, it just can't keep up with the hex core i7s in multi-threaded games or benchmarks. The age of the quad core is over, this is the age of hex core.

 

[Dresdenboy]

I missed some interesting pages during Xmas trouble.

rand() returns a signed int.

This is just the type. The value range starts at 0. A :beer: for me!

@Dresdenboy and the likes. What about a zen+ arch thread?
We want crazy stuff like 5 wide, smt 4t/core, no avx2

Good idea. I don't have solid info so far, but what didn't make it into Zen (patented stuff) might turn up to be in Zen+.

 

[PhonakV30]

What can we do with AVX 512?

 

[krumme]

Good idea. I don't have solid info so far, but what didn't make it into Zen (patented stuff) might turn up to be in Zen+.

Super. Also just give us a hint or pm if you make a post on your blog regarding eg the patents that didnt make it to zen.
As a starter when we have solid info and bm of zen it would also be nice to hear your evaluation of what was surpricing.

 

[Timmah!]

My 6800K routinely runs at 4.4GHz on all cores at full load (base is 4.1), its only when you load up the GPU that it starts to throttle if the temperature gets too high. Which it does occasionally due to the cramped case I'm using.

What vcore for that 4,4GHz clock? Other settings? Would love to run my 6850k at that speed, but not even 1,35V is enough to pass either IBT or Realbench, even though temps are slightly under 70C per RealTemp. And i already consider 1,35V too much for 24/7.

 

[rvborgh]

i actually run my Quad Opteron 61xx extra spicy's this way... 2 K10 cores (# 1 and #4) on each of the 8 dies at 3.6 Ghz and the rest slow (1.4 GHz). It definitely keeps the heat down

Such behavior has been a standard feature, since... K10 (Pharaohound) I believe?
For example on 15h CPUs and APUs the highest turbo frequencies (states) had activation conditions, which usually required half of the CUs being power gated before it could fire.

If you have a 8 core CPU with TDP of 45W or more, your maximum single core boost is obviously never power limit bound.

 

[bjt2]

What can we do with AVX 512?

If the decoders can spit 4 microcoded istruction/cycle and the microcode is expanded only at dispatch level, i can't see any limit: you only have to make all 4 FP pipeline equal and possibly also capable of FMACs and AVX 512 are just 4uops intructions... And to not have bottlenecks, you should only beef up buses (e.g. 8+ uop dispatch, 10+ retire etc...)

 

[KTE]

If the decoders can spit 4 microcoded istruction/cycle and the microcode is expanded only at dispatch level, i can't see any limit: you only have to make all 4 FP pipeline equal and possibly also capable of FMACs and AVX 512 are just 4uops intructions... And to not have bottlenecks, you should only beef up buses (e.g. 8+ uop dispatch, 10+ retire etc...)

L1 L/S bandwidth is the usual culprit limiting max FLOPs. Remember, SnB needing 2 cycles to store for AVX.

Sent from HTC 10
(Opinions are own)

 

[itsmydamnation]

L1 L/S bandwidth is the usual culprit limiting max FLOPs. Remember, SnB needing 2 cycles to store for AVX.

Sent from HTC 10
(Opinions are own)

I used to think this but now im less and less sure, AMD have gone with very high bandwidth from L1->L2->L3 and even the heaviest SPEC FP workloads are 30-40% load ops and 10-20% store ops i would love to see some profiling of 256bit AVX and AVX2 heavy workloads.

 

[bjt2]

L1 L/S bandwidth is the usual culprit limiting max FLOPs. Remember, SnB needing 2 cycles to store for AVX.

Sent from HTC 10
(Opinions are own)

Doubling the buses can also include L1, L2 and L3 buses...

 

[Insert_Nickname]

What vcore for that 4,4GHz clock? Other settings? Would love to run my 6850k at that speed, but not even 1,35V is enough to pass either IBT or Realbench, even though temps are slightly under 70C per RealTemp. And i already consider 1,35V too much for 24/7.

Oh. Sorry. 6800K means something else now too. Its a Richland AMD A10-6800K, not a Broadwell 6800K.

 

[frozentundra123456]

What vcore for that 4,4GHz clock? Other settings? Would love to run my 6850k at that speed, but not even 1,35V is enough to pass either IBT or Realbench, even though temps are slightly under 70C per RealTemp. And i already consider 1,35V too much for 24/7.

Off topic here, but according to silicon lottery, 60% of 6850k chips can hit 4.4, so if you got a slightly worse than ave chip, you might not make it.

 

[Sweepr]

AMD is rumoured to be fabricating Ryzen CPUs with both Glofo and Samsung

https://www.overclock3d.net/news/cp...alfoundries_and_samsung/1#.WGec14mKuFk.reddit

 

[crashtech]

That can only be for the good. If Samsung's offerings perform better, the pressure on GloFlo to improve will be intense.

 

[The Stilt]

Makes no sense, unless GlobalFoundries has issues with the quality / yield. Fab 1 with it's 80k 300mm wafer capacity was sufficient to manufacture all 32nm designs at their production peak in 2012 - 2013. Pretty hard to imagine how Fab 8 could not manufacture a single, significantly smaller 14nm design with it's 60k 300mm wafer capacity. The demand will be significantly higher than for the older models combined, but still.

 

[Doom2pro]

Makes no sense, unless GlobalFoundries has issues with the quality / yield. Fab 1 with it's 80k 300mm wafer capacity was sufficient to manufacture all 32nm designs at their production peak in 2012 - 2013. Pretty hard to imagine how Fab 8 could not manufacture a single, significantly smaller 14nm design with it's 60k 300mm wafer capacity. The demand will be significantly higher than for the older models combined, but still.

Well AMD has Polaris, Vega and Zen at Global Foundries... The last time they did a CPU & GPU at the same time they were using TSMC for the GPU. There are other players using the same 14nm node as well no? Makes sense to me, they need more wafers than Global Foundries can provide.

 

[The Stilt]

Well AMD has Polaris, Vega and Zen at Global Foundries... The last time they did a CPU & GPU at the same time they were using TSMC for the GPU. There are other players using the same 14nm node as well no? Makes sense to me, they need more wafers than Global Foundries can provide.

Damn, I forgot about Polaris
Vega shouldn't be in mass production yet, but Polaris 10 / 11 definitely require some wafers

In case the rumor is true, there will be a hunt for specimens with Diffused in Korea vs. Diffused in USA etched on them.

 

[Doom2pro]

In case the rumor is true, there will be a hunt for specimens with Diffused in Korea vs. Diffused in USA etched on them.

Doesn't Samsung have a 300mm fab in Austin Texas?

Edit: Yep, the Austin Plant is known as the S2-Line, and per Samsung it's capable of 14nm...

Samsung Foundry's 300mm logic fabs, known as the S1-Line and S2-Line are state-of-the-art facilities enable the high-volume manufacturing using 65nm, 40nm, 32/28nm and 14nm process technologies.

That might mix things up a bit... Diffused in USA could mean Fab 8 in Malta or S2-Line in Austin... DOH!

 

[The Stilt]

Doesn't Samsung have a 300mm fab in Austin Texas?

They do

 

[HurleyBird]

In case the rumor is true, there will be a hunt for specimens with Diffused in Korea vs. Diffused in USA etched on them.

In a way, dual sourcing makes more sense for a product like Zen than it does for some iPhone chip. After all, if one fab produces significantly better parts, then those will be used in the more premium bins.

 

[Dresdenboy]

L1 L/S bandwidth is the usual culprit limiting max FLOPs. Remember, SnB needing 2 cycles to store for AVX.

Sent from HTC 10
(Opinions are own)

Aside from using temp values in regs/on stack, I assume 2 loads per store already limit the store bandwidth.

 

[farosis]

makes perfect sense to me, AMD is trying very hard to unbind with GLOFO, remember AMD will pay GLOFO with money that produce chips in other foundries ?
GLOFO has a record of messing up and will probably continue to be, otherwise they won't use samsung's 14nm tech.

 

[iBoMbY]

In my opinion it doesn't make sense to produce one die at two different fabs from two different manufacturers. This would increase the production cost (you need more masks, more QA, etc.). It would make more sense to move other products to Samsung, like Vega and Polaris 12, and maybe even Polaris 10 and 11. And AMD is not trying to move away from GloFo, and they are going to use the 7nm IBM/GloFo process in the future, which will not be available anywhere else.

Edit: Also the WSA still states all CPUs and APUs, and some GPUs have to be produced at GloFo. And all exceptions need to be agreed on by GloFo.

 

[Doom2pro]

In my opinion it doesn't make sense to produce one die at two different fabs from two different manufacturers. This would increase the production cost (you need more masks, more QA, etc.).

Not according to Samsung:

In April 2014, Samsung and GLOBALFOUNDRIES put the rest of the foundry industries on notice with its game changing 14nm licensing agreement. A new strategic collaboration between Samsung and GLOBALFOUNDRIES provides unprecedented global capacity for 14nm FinFET technology leadership and gives customers assurance of supply that can only come from true design compatibility at multiple sources across the globe.

Design with Common PDK, All fabs are in sync, including materials, processrecipes, integration and tools to multiple technology matched foundries

 

[Glo.]

Makes no sense, unless GlobalFoundries has issues with the quality / yield. Fab 1 with it's 80k 300mm wafer capacity was sufficient to manufacture all 32nm designs at their production peak in 2012 - 2013. Pretty hard to imagine how Fab 8 could not manufacture a single, significantly smaller 14nm design with it's 60k 300mm wafer capacity. The demand will be significantly higher than for the older models combined, but still.

If AMD has a customer that would want a LOT of hardware, then it makes sense. Look at this: http://semiaccurate.com/2014/04/17/semiaccurate-right-apples-foundry-plans/

and quote:

They did the same for the first part of the story too, the main customer for this 14nm synced process.

Look at the link in the quote.

Only MBP has been updated lately, by Apple. Shift from Intel CPUs to AMD hardware would not be that illogical, and for that AMD would need A LOT of fab capacity.