AMD Radeon RX Vega 64 and 56 Reviews [*UPDATED* Aug 28]

[Olikan]

Double post, sorry....

 

[estarkey7]

Indeed it has been and what AMD does for the same features.
Thus, I negate either of them when it comes to this metric and instead look at others.

I don't see them enabling it for general purpose compute which is for OpenCL not vulkan/DX12. AMD already disables a slew of features on their consumer cards just like Nvidia thus there's no reason to believe this will change. I have a good feeling that HBCC and FP16 will be restricted to the gaming pipeline so as to ensure it doesn't compete w/ their workstation cards because they do this very thing right now for other features. Another thing is the beta state of their compute stack and Rocm. They targetted compute with this architecture clearly which is why they are heavily pushing their workstation/pro/server cards and not vega consumer. Vega consumer was an afterthought of a compute architecture. Now the issue because, how much stuff are they going to disable/gimp for compute on vega RX as they dont want it competing with their other cards. As they have made no mention of it (which they would if they hoped to sell more cards), it's likely that they will be gimping it and what wiggle room for the technical gimping they plan to implement..

So, FP16 .. yeah amazing feature for gaming and x,y,z gaming....
Q : Will it be available for general purpose compute?
A : No.. But if you want to use compute it is slightly enabled on Vega FE and fully on pro/workstation

What features are enabled on the FE and disabled on RX Vega 64? I do premiere pro and after effects and I'm trying to figure out which card gives me the most bang for my buck. Is 10-bit color enabled on RX VEGA 64?

 

[ub4ty]

https://www.amd.com/Documents/Radeon-Pro-SSG-Technical-Brief.pdf
What HBCC was really designed for. Again, can't stress enough the NVME ssd that is present on the GPU to make this module sensical. Without it, this is literally just DMA/IOMMU transferring pinned memory which already exists and Nvidia kicks the dog**** out of Radeon in this area.

 

[ub4ty]

What features are enabled on the FE and disabled on RX Vega 64? I do premiere pro and after effects and I'm trying to figure out which card gives me the most bang for my buck. Is 10-bit color enabled on RX VEGA 64?

Welcome to Radeon's marketing disaster and lack of prominently detailing this.
I have no clue nor are they being honest and straight forward about what will or wont be enabled/disabled/gimped down the line. All I can go by are a bunch of marketing slides that talk about features at a high level and elementary architectural diagrams. As far as I know, they have the same dies. So...

Correct me if I'm wrong anybody.

 

[Elixer]

Is 10-bit color enabled on RX VEGA 64?

10 bit output support has been on AMD cards for a long time.
Here is the slide from Polaris...

 

[Krteq]

https://www.amd.com/Documents/Radeon-Pro-SSG-Technical-Brief.pdf
What HBCC was really designed for. Again, can't stress enough the NVME ssd that is present on the GPU to make this module sensical. Without it, this is literally just DMA/IOMMU transferring pinned memory which already exists and Nvidia kicks the dog**** out of Radeon in this area.

That document is referring to Fiji SSG, not a Vega SSG . HBCC isn't just a kind of DMA engine.

 

[ub4ty]

That document is referring to Fiji SSG, not a Vega SSG . HBCC isn't just a kind of DMA engine.

It's all the same junk IMO. Industry standard DMA/IOMMU w/ some custom work to interface to NVME on board the GPU w/ a bunch of marketing slapped on. The same SSG for Fiji was carried over with some spit shine.

 

[Krteq]

It's all the same junk IMO...

Stopped reading there. Please stop using your thoughs/opinions as an official information. I replied to your HBCC claims in another thread.

 

[ub4ty]

Stopped reading there. Please stop using your thoughs/opinions as an official information. I replied to your HBCC claims in another thread.

Your reply in this and the other thread have no technical depth nor contradict a single word that I've stated. You're welcome to stop reading, Question : Do you work in the industry or have a degree in computer engineering or CS? If not, I just want to let you know that it shows and you appear to be out of your depth beyond regurgitating marketing slides.

Anyone whose taken a basic introductory course knows the basic components of a memory subsystem including :
https://en.wikipedia.org/wiki/Paging
It's been around since the 60s (windows 3.x) and has been used in GPUs for some time. Only someone who lacks any basic understanding of computer hardware and memory management would argue for page after page based on some trumped up marketing slides and be convinced they stand on some higher ground of understanding. Your very commentary demonstrates you don't know what you're talking about. So, do yourself a favor and stop posting nonsense.

Even if you had no formal education, if you stopped railing on ad naseum and simply googled for 5min, you'd understand that Nvidia has already ran these same slides years ago :

OMG !!! Changing the world. Notice the difference in slide decks. Nvidia covers the technical details and uses industry standard language.. Radeon meanwhile claims they've created the second coming..

The only people who are convinced by this are absolute brainlets and it shows.

 

[Grubbernaught]

"It's been around since the 60s (windows 3.x)"

You might want to take a look at that statement and reflect on the overall tone of your last post.

 

[MajinCry]

Someone's got to gate the keeps.

 

[Janooo]

You are missing the point. Yes, you have all these shaders on previous GPUs. The difference is, they are all tied to a specific pipeline stage, while the Primitive Shader can handle all stages in one shader, and can cull primitives earlier, to reduce the workload of following steps....

It appears to me he is missing the point big time.

I think Vega takes the next step towards the goal of a software defined pipeline, where you don't even have a conventional graphics API, the graphics types of vertex, primitive or fragment aren't baked in and inter-stage buffer configuration is determined at run time. I think we both agree this would be neat.

From https://forum.beyond3d.com/posts/1998144/

If a software defined pipeline can be achieved on Vega, that's revolutionary.
The pipeline could be configured dynamically and it could be much more efficient use of the HW.

This extremely different approach requires SW to catch up the HW.

 

[nathanddrews]

New Tom's review of the V56 including some extensive power testing... if people still care anymore...

http://www.tomshardware.com/reviews/radeon-rx-vega-56,5202.html

 

[Despoiler]

Your reply in this and the other thread have no technical depth nor contradict a single word that I've stated. You're welcome to stop reading, Question : Do you work in the industry or have a degree in computer engineering or CS? If not, I just want to let you know that it shows and you appear to be out of your depth beyond regurgitating marketing slides.

Anyone whose taken a basic introductory course knows the basic components of a memory subsystem including :
https://en.wikipedia.org/wiki/Paging
It's been around since the 60s (windows 3.x) and has been used in GPUs for some time. Only someone who lacks any basic understanding of computer hardware and memory management would argue for page after page based on some trumped up marketing slides and be convinced they stand on some higher ground of understanding. Your very commentary demonstrates you don't know what you're talking about. So, do yourself a favor and stop posting nonsense.

Even if you had no formal education, if you stopped railing on ad naseum and simply googled for 5min, you'd understand that Nvidia has already ran these same slides years ago :

OMG !!! Changing the world. Notice the difference in slide decks. Nvidia covers the technical details and uses industry standard language.. Radeon meanwhile claims they've created the second coming..

The only people who are convinced by this are absolute brainlets and it shows.

For someone touting a formal education you sure can't read between the lines. 1) Paging has existed for a long time. That's not the point. Unified memory space has not. AMD started pushing towards it with their HSA initiative. 2) Nvidia's Page Migration Engine was introduced in the Pascal architecture. # years doesn't matter. # architectures does. 3) It can only be accessed by CUDA. CUDA isn't completely compatible with graphics APIs if at all. 4) AMD's HBCC brought unified memory to the masses. It's exposed to devs for gaming. So in terms of this forum IT'S A BIG DEAL! 5) Kobe sucks.

 

[Glo.]

For someone touting a formal education you sure can't read between the lines. 1) Paging has existed for a long time. That's not the point. Unified memory space has not. AMD started pushing towards it with their HSA initiative. 2) Nvidia's Page Migration Engine was introduced in the Pascal architecture. # years doesn't matter. # architectures does. 3) It can only be accessed by CUDA. CUDA isn't completely compatible with graphics APIs if at all. 4) AMD's HBCC brought unified memory to the masses. It's exposed to devs for gaming. So in terms of this forum IT'S A BIG DEAL! 5) Kobe sucks.

The only problem in what you are writing is that HBCC's role is much more than only graphics. HBCC where can help is only with minimum framerates, but it will not help front end bottleneck out of any hardware level. It is most useful currently in datacenters, where data has to be accessed immediately when it is needed and in VR applications, because it reduces latency(will reduce when devs will start using it).

 

[krumme]

Well seems to be rx 56 in stock for cheap in uk for now
https://www.scan.co.uk/products/sta...eams-1156mhz-1471mhz-boost-800mhz-hbm2-dp-hdm

 

[dlerious]

Well seems to be rx 56 in stock for cheap in uk for now
https://www.scan.co.uk/products/sta...eams-1156mhz-1471mhz-boost-800mhz-hbm2-dp-hdm

Description says pre-order and also says limited launch offer on price. Not sure if it's actually in stock - tried adding it to my cart and it came up like it was in stock (at 391 pounds with over 65 pounds for VAT). Too much money for someone in the US.

I tried finding them in stock in US, but all I could find was another Auto-Notify for the XFX from Newegg (at 9:02 AM EDT). It's probably going to be like the Vega 64 when I get the back in stock notification ($200 over MSRP). Looks like Nvidia is going to end up getting my money.

 

[ub4ty]

New Tom's review of the V56 including some extensive power testing... if people still care anymore...

http://www.tomshardware.com/reviews/radeon-rx-vega-56,5202.html

Apparently the Amazon stock showed 7 cards being available before it sold out in the first minute.... So, not until they actually stock the cards. Seems available is headed towards winter and this was more of a paper (feature) launch and a limited supply soft launch to appease shareholders. Meanwhile, they're progressing the finewine meme (extended development) while there are no cards in stock.

 

[Despoiler]

The only problem in what you are writing is that HBCC's role is much more than only graphics. HBCC where can help is only with minimum framerates, but it will not help front end bottleneck out of any hardware level. It is most useful currently in datacenters, where data has to be accessed immediately when it is needed and in VR applications, because it reduces latency(will reduce when devs will start using it).

Sure there are a lot of uses for the HBCC. I was only pointing out that Nvidia put their version behind their CUDA walled garden where AMD exposes it for general use. Check the article out below. GDDR memory shortages. Although Vega uses HBM2 and Vega has more than enough memory for most games, HBCC will reduce the need for so much memory. I suspect that AMD will freeze VRAM size where it is rather than continuing to add more am more in Navi and beyond. This will save them quite a bit of money.

http://www.digitimes.com/news/a20170828PD207.html

 

[n0x1ous]

Description says pre-order and also says limited launch offer on price. Not sure if it's actually in stock - tried adding it to my cart and it came up like it was in stock (at 391 pounds with over 65 pounds for VAT). Too much money for someone in the US.

I tried finding them in stock in US, but all I could find was another Auto-Notify for the XFX from Newegg (at 9:02 AM EDT). It's probably going to be like the Vega 64 when I get the back in stock notification ($200 over MSRP). Looks like Nvidia is going to end up getting my money.

best buy had XFX versions for $499 in stock a few minutes ago

edit - gone

 

[zinfamous]

Newegg currently still has 56 w/ Wolfenstein and Prey for $499

https://www.newegg.com/Product/ComboBundleDetails.aspx?ItemList=Combo.3623491

 

[ub4ty]

For someone touting a formal education you sure can't read between the lines. 1) Paging has existed for a long time. That's not the point. Unified memory space has not. AMD started pushing towards it with their HSA initiative. 2) Nvidia's Page Migration Engine was introduced in the Pascal architecture. # years doesn't matter. # architectures does. 3) It can only be accessed by CUDA. CUDA isn't completely compatible with graphics APIs if at all. 4) AMD's HBCC brought unified memory to the masses. It's exposed to devs for gaming. So in terms of this forum IT'S A BIG DEAL! 5) Kobe sucks.

There are no lines to be read through until AMD demonstrates it actually functions and performs in any notable fashion on RX Vega consumer. If you've managed to figure out how to use google, you would know that reviewers have enabled HBCC and have tried to figure out if it works and how well it performs. Sometimes it results in same performance. Sometimes worse.
1.) Paging memory has existed for a long time so excuse me for not jumping over backwards because Radeon group is relabeling it with non industry standard language. This is what an education does for you.. It tempers your outlandish dream like assumptions about marketing slides
2.) Yes, if you've managed to read between the lines of my comments, my particular focus and use case is compute. So, if HBCC is only available to the GPU pipeline, it's useless to me. Has Radeon detail this? Nope ofc not. Also, if you've managed to read between the lines on what this feature is for, it's mainly for compute flows with large consistent contiguous, predictable, and pinneable data sets... Not for volatile gaming data sets especially not in Real-time graphics generation pushing north of 60fps whereby the PCI-E latency would cause issues with respect to whatever data you could predict and page across in time.. But hey, formal education again thinking about the engineering details and technicalities. Something you obviously aren't thinking about
3.) Yeah, read between the lines. That's what pinned memory is for : Compute... That's what it's used for on PRO SSG (8k video editing) whereby you have huge asset files that enjoy large page files and can be fit in consecutive and contiguous memory allocations. Do you have a formal education in this area? It seems you obviously do not
4.) AMD's RTG GROUP hasn't brought a single thing to the masses on consumer RX Vega as it hasn't been proven what in the world this is beyond PRO SSG w/ NVME storage that is specifically designed for compute tasks not gaymen. Instead, what this is, is cost cutting of die cuts whereby they've included a gimped feature in consumer cards and are literally making up its use case on the fly.
5.) Kobe doesn't suck but this highlights your distaste for people who are skillful in their craft including me.

 

[ub4ty]

Newegg currently still has 56 w/ Wolfenstein and Prey for $499

https://www.newegg.com/Product/ComboBundleDetails.aspx?ItemList=Combo.3623491

out of stock

 

[EXCellR8]

srry, repost. what he said^

 

[Glo.]

OMG !!! Changing the world. Notice the difference in slide decks. Nvidia covers the technical details and uses industry standard language.. Radeon meanwhile claims they've created the second coming..

The only people who are convinced by this are absolute brainlets and it shows.

This is because Nvidia is software implementation. AMD does not have to give you any documentation on HBCC, because it is HBCC's job to manage all the data, for you. With Nvidia's approach you have to program specifically for specific boarders within Memory Controller. With AMD approach, you don't have to because it is the memory controllers job.

I love that people who are supporting Nvidia are liking your post but that shows your and their's lack of understanding what you are commenting on.

There are no lines to be read through until AMD demonstrates it actually functions and performs in any notable fashion on RX Vega consumer. If you've managed to figure out how to use google, you would know that reviewers have enabled HBCC and have tried to figure out if it works and how well it performs. Sometimes it results in same performance. Sometimes worse.
1.) Paging memory has existed for a long time so excuse me for not jumping over backwards because Radeon group is relabeling it with non industry standard language. This is what an education does for you.. It tempers your outlandish dream like assumptions about marketing slides
2.) Yes, if you've managed to read between the lines of my comments, my particular focus and use case is compute. So, if HBCC is only available to the GPU pipeline, it's useless to me. Has Radeon detail this? Nope ofc not. Also, if you've managed to read between the lines on what this feature is for, it's mainly for compute flows with large consistent contiguous, predictable, and pinneable data sets... Not for volatile gaming data sets especially not in Real-time graphics generation pushing north of 60fps whereby the PCI-E latency would cause issues with respect to whatever data you could predict and page across in time.. But hey, formal education again thinking about the engineering details and technicalities. Something you obviously aren't thinking about
3.) Yeah, read between the lines. That's what pinned memory is for : Compute... That's what it's used for on PRO SSG (8k video editing) whereby you have huge asset files that enjoy large page files and can be fit in consecutive and contiguous memory allocations. Do you have a formal education in this area? It seems you obviously do not
4.) AMD's RTG GROUP hasn't brought a single thing to the masses on consumer RX Vega as it hasn't been proven what in the world this is beyond PRO SSG w/ NVME storage that is specifically designed for compute tasks not gaymen. Instead, what this is, is cost cutting of die cuts whereby they've included a gimped feature in consumer cards and are literally making up its use case on the fly.
5.) Kobe doesn't suck but this highlights your distaste for people who are skillful in their craft including me.

You get mixed results with HBCC, because of two reasons. In current state of drivers you are limited to only 64 GB page, as a maximum. It will be full 512 TB of data indexed, when AMD will fix the drivers, and allow full capability.

Second reason is Simple. Software is not designed with HBCC in mind. Current implementation - you had to manage memory yourself. HBCC's job is, as I have written, to manage it for you.

Im sorry, but you are showing complete lack of understanding of what you are talking about.