AMD "MirrorBit"?

[CTho9305]

I can't find any infomration on their site more technical than this... and while that paper explains quite well how "the competition" works, I still don't understand how they're reading/storing the two separate values into the same gate. Does anyone understand what exactly they're doing?

 

[Matthias99]

For some reason I can't copy/paste out of that article, so I'll retype a few sentences of it:

The MirrorBit architecture uses a radical new design and process technology to double the density without any performance penalty. In the MirrorBit cell, the basic transistor itself is very different from conventional transistors. Instead of the classical asymmetric transistor with a distinctly doped source and drain, the MirrorBit cell uses a symmetric transistor with similar source and drain. The charge storage element has been modified to allow electrons to be stored on either side of the cell. Once electrons are placed into one side of the storage element, say on the left side of the cell, they remain trapped on that side. Consequently, read, program, and erase operations are performed at full speed and power regarless of whether one is using the left bit or right bit. As a result, the basic memory cell behaves as though it were two independent conventional memory cells. This architecture therefore offers twice the density of standard Flash without sacrificing performance or reliability.

I doubt you'll get more than that out of them, at this is undoubtedly patented. From the diagrams and such, it looks like they basically took a floating gate transistor and managed to "partition" the floating gate (they're very fuzzy on how they did this) so that it functions as two physically separate units. Then they used a substrate where either side can be the source or drain -- and then you would just choose which side to read/write by using either the left or right as the source. Or something like that. In theory you'd double the storage density, but your control circuitry is going to be somewhat more complex, since you have to be able to read from either side of the cell. Sounds interesting, presuming it doesn't cost too much more to produce than standard Flash memory.

 

[rjain]

If it's patented, then you'll get all the info needed to recreate the system from the patent.

 

[pm]

Intel's Strataflash (the "competition" in the paper), programs the gate so that you get two different threshold voltages out of the same gate. So basically you program the gate and the length of the time that you spend programming determines the value. You have very low, mid-low, mid-high and high. The AMD Mirrorbit basically uses symmetric operation to store one bit on the left and one bit on the right and you can read the two bits by forward-biasing and reverse-biasing the cell and seeing how it behaves.

The quote that Matthias gave explains it pretty well. The way they did the partitioning is based on the physic way that electrons get trapped in the gate. They are trapped statistically to one side of the gate (the source side), but if you fabricate the gate to be symmetric electrically and you have the ability to reverse the voltages, then you can reverse the operation they should get trapped or released on one side or the other. Then you have to reverse the connections to read the value out.

One advantage of the Strataflash technique is that you could go to more than 2 levels and do, for example, a tri-bit gate, or a quad-bit gate. But the paper has a point about the difficulties of scaling. But what isn't mentioned is that Flash technology is running into difficulties scaling as a technology regardless of how many bits you have. Hence the hunt for new technologies such as MRAM, FRAM, Ouvonic, etc.

 

[CTho9305]

Originally posted by: rjain
If it's patented, then you'll get all the info needed to recreate the system from the patent.

This patent (and this image) seem to be relevant - they're assigned to the company that sued AMD 😉. It looks like the conductivity of the channel is magically affected only by the part of the gate closer to the source of the transistor. Why?

(this patent is also relevant)

 

[rjain]

It's probably that the conductivity is MORE affected by what's nearby, as that's what's closer... 🙂
The trick was probably in engineering it so that the difference in effect was enough to be reproducibly measurable.

 

[CTho9305]

Originally posted by: rjain
It's probably that the conductivity is MORE affected by what's nearby, as that's what's closer... 🙂
The trick was probably in engineering it so that the difference in effect was enough to be reproducibly measurable.

An analogy that must be wrong: if I'm pumping water through a pipe, which has two things that can impede the flow, one at each end... you won't be able to tell which of the two is impeding more.

Why is the analogy wrong? I would *guess* it is because the channel in a transistor is bigger at one end, so the part of the gate near the narrow end would have a larger effect. Is that correct?

 

[rjain]

Hmm, a silicon channel isn't exactly comparable to a water pipe, as there's nothing that much like fluid flow going on in it. Turbulence can cause very complex flow patterns in a water pipe.

 

[CTho9305]

Originally posted by: rjain
Hmm, a silicon channel isn't exactly comparable to a water pipe, as there's nothing that much like fluid flow going on in it. Turbulence can cause very complex flow patterns in a water pipe.

You took my poor analogy too far.
edit: Page 46 of Principles of CMOS VLSI Design (Weste, Eshraghian [how do you pronounce those, so I can mention it in an interview without sounding like an idiot]), looks relevant, but I don't have time to re-read that section right now.

 

[rjain]

The reason you can't tell which end is impeding more is because of the voritces created by the flow...

Maybe I didn't understand what you were trying to show. 😛

 

[CTho9305]

Originally posted by: rjain
The reason you can't tell which end is impeding more is because of the voritces created by the flow...

Maybe I didn't understand what you were trying to show. 😛

Let's use a simple circuit of variable resistors. Given a wire with 2 resistors in it, you can only find the total resistance, you can't figure out which resistor has what value. Something must be different in the gate situation. My guess was that the problem with the analogy is that the inversion / depletion layers are not uniform thicknesses across the area between the source and drain, and therefore there would be a difference in how much effect each side of the gate would have.

 

[rjain]

After looking at the design in more detail, it looks like the two parts aren't nearer or farther from the source and drain, but nearer or farther from what is currently acting as the source or drain. The current passes directly through both of the parts of the gate in the same way, one after the other. Is that correct?

 

[CTho9305]

Originally posted by: rjain
After looking at the design in more detail, it looks like the two parts aren't nearer or farther from the source and drain, but nearer or farther from what is currently acting as the source or drain. The current passes directly through both of the parts of the gate in the same way, one after the other. Is that correct?

That's how I interpret it...

 

[Matthias99]

How about this for sensing?

In a normal floating-gate MOSFET, you get a current flow from source to drain when there is a charge placed in the floating gate and you apply a voltage to the gate and source (it creates a repulsion so the electrons can "skate" across the transistor surface from source to drain).

In this system, there are four possible states for the gate: 00, 01, 10, and 11. At 00, no charge flows. At 11, charge flows freely both ways (just like a regular MOSFET). In state 01 (no charge on the "left" side, charge on the "right"), you'd probably get no current left-to-right, but you would be able to push at least some electrons from right-to-left out onto the gate surface, probably creating a measurable capacitance and/or very small current. In state 10, you'd have the opposite effect. You could use that to tell which side was "on" and which was "off".

Edit: that second patent is definitely this technology. Here's their (poorly worded) description of the read process:

...reading said first bit in a direction opposite said first forward direction by applying read voltages to said second region and said gate and grounding said first region, and subsequently determining if said first binary value is stored by sensing a first current between said second and said first regions or if said second binary value is stored by sensing a second current between said second and said first regions, said second current being higher than said first current;

reading said second bit in a direction opposite said second forward direction by applying read voltages to said first region and said gate and grounding said second region, and subsequently determining if said third binary value is stored by sensing a third current between said first and said second regions or if said fourth binary value is stored by sensing a fourth current between said first and said second regions, said fourth current being higher than said third current;

Looks like you read the left side by applying a voltage to the gate and looking for a current running from right to left (right = source, left = drain) above a certain threshold. Flip it for the right. Sort of like what I was talking about, but I think I had the directions backwards.