They are cutting the 90nm high end 2Mb cache AM64 CPU's which are their best performing parts currently.
Since they only made a 65nm mask for the 1Mb cache ships they must be retionalising space to produce 65nm parts.
Presumably they have fixed their speed issues and are binning faster cpu's.
This is something that has to be done I suppose in order to make the most out of what they have, though the 2Mb chips are good.
Kiss goodbye to the 6000 and 6400 cpu's ... I guess they will increase the speed to compensate for the loss of cache.
I assume this leaves more room to do Phenoms too.
Hope they have fixed the issues with 65nm ... so this could signal very good news.
I look on the optomistic side of things.
Since they only made a 65nm mask for the 1Mb cache ships they must be retionalising space to produce 65nm parts.
Presumably they have fixed their speed issues and are binning faster cpu's.
This is something that has to be done I suppose in order to make the most out of what they have, though the 2Mb chips are good.
Kiss goodbye to the 6000 and 6400 cpu's ... I guess they will increase the speed to compensate for the loss of cache.
I assume this leaves more room to do Phenoms too.
Hope they have fixed the issues with 65nm ... so this could signal very good news.
I look on the optomistic side of things.
Nemesis 1
Lifer
- Dec 30, 2006
- 11,366
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New high-end workstation card. FireGL V8650 2GB.
http://www.fudzilla.com/index....=view&id=4637&Itemid=1
http://www.fudzilla.com/index....=view&id=4637&Itemid=1
Looks like they've found their niche. The advantages of the V8650 outweigh its minor disadvantages, and at a significantly lower price, nonetheless.
Granted, that's a bit of a tight niche compared with mainstream graphics/processors, but I believe that Cool&Quiet keeps AMD as one of the better choices for general mobile processing, and again, the 3850/70 have much smaller power requirements than the equivalent nVidia pieces.
Maybe the future isn't quite as grim as we'd all feared.
I dunno . . .
The 3D Professor AMD?s FireGL V8650 Ultra High End is a big deal - more highly lucrative than the gaming segment.
And most importantly, returns mucho respect to the FireGL brand - which went to sh*t after ATI got 'em five or so years ago from Diamond.
Quiksilver
Diamond Member
- Jul 3, 2005
- 4,725
- 0
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I'm more interested in Fudzilla's track record; IE- how much of it ends up as FUD. Than the FireGL card.
No no...the big surprise is that AMD is shipping hundreds of thousands of Phenoms this quarter.
More from the Spin Doctors
More from the Spin Doctors
I believe the announcement was the new Violin Memory modules...
PR
Violin and AMD will use HyperTransport technology to enable Violin 1010 Memory Appliances to connect directly with AMD Opteron processor-based servers and extend main memory resources. The cache coherency protocol of HyperTransport technology will enable several processors to share extensive memory resources from one or more Violin Memory Appliances. This extended memory model will enable these servers to support much larger datasets.
Violin has developed a unique switched memory technology that delivers RAID-like redundancy and allows failed memory modules to be replaced without the loss of application data. A single 2U appliance can support 84 Violin Memory Modules (VIMMs). Each module supports 6 GB of DRAM, which provides for total appliance capacity of 504 GB
PR
Violin and AMD will use HyperTransport technology to enable Violin 1010 Memory Appliances to connect directly with AMD Opteron processor-based servers and extend main memory resources. The cache coherency protocol of HyperTransport technology will enable several processors to share extensive memory resources from one or more Violin Memory Appliances. This extended memory model will enable these servers to support much larger datasets.
Violin has developed a unique switched memory technology that delivers RAID-like redundancy and allows failed memory modules to be replaced without the loss of application data. A single 2U appliance can support 84 Violin Memory Modules (VIMMs). Each module supports 6 GB of DRAM, which provides for total appliance capacity of 504 GB
It could also be the announcement of the new IBM/AMD 32nm HK/MG process...
EETimes
"IBM and its joint-development partners have announced that their "high-k/metal gate" technology in next-generation 32nm devices will be available to IBM alliance members and their clients in the second half of 2009"
"They have also incorporated high-k silicon-on-insulator (SOI) technology at 32nm for high-performance applications. The high-k material properties enable a 30 percent transistor speed increase over the previous generation of high performance SOI technology"
"Separately, Intel has made 32nm announcements, but Patton believes "IBM is first in developing working SRAMs in 32nm for both low-power and high-performance applications.""
EETimes
"IBM and its joint-development partners have announced that their "high-k/metal gate" technology in next-generation 32nm devices will be available to IBM alliance members and their clients in the second half of 2009"
"They have also incorporated high-k silicon-on-insulator (SOI) technology at 32nm for high-performance applications. The high-k material properties enable a 30 percent transistor speed increase over the previous generation of high performance SOI technology"
"Separately, Intel has made 32nm announcements, but Patton believes "IBM is first in developing working SRAMs in 32nm for both low-power and high-performance applications.""
myocardia
Diamond Member
- Jun 21, 2003
- 9,291
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Wow, Viditor, you should have stopped by last night. Both of those are much better announcements than anything we've come up with so far. It's good to know that AMD won't be trying to use SOI with their 32nm chips, and Violin might be what AMD needs to take back the portion of the server market that they've lost over the last year or so.
Not really (not quickly). Each manufacturing process is slightly different (sometimes very different; AMD using SOI and TSMC using bulk is pretty significant). If you make a non-aggressive design, it's easy to port it between the processes; if you're more aggressive, it becomes harder to port the design. CPU designs are usually extremely aggressive, so they're a lot of work to port (even shrinks like 90nm -> 65nm are a lot of work).
To give a wishy-washy explanation, consider building an engine. You could come up with a very conservative design that works fine with either mostly aluminum parts or 100% steel parts, but it wouldn't be an optimal design for either material. On the other hand, you could optimize the hell out of a design intended only for steel parts and eek out every last horsepower / mile per gallon. Of course, if for some reason you want to switch to a different metal, it's going to be a lot of work. If anyone wants a more technical explanation, start a new thread asking why it's hard to port designs between processes (and send me a pm so I see it
).Isn't the 55nm process pretty close to the 65nm one? Would that not make the shink easier than either 90nm to 65nm, or 65nm to 45nm?Originally posted by: CTho9305
Not really (not quickly). Each manufacturing process is slightly different (sometimes very different; AMD using SOI and TSMC using bulk is pretty significant). If you make a non-aggressive design, it's easy to port it between the processes; if you're more aggressive, it becomes harder to port the design. CPU designs are usually extremely aggressive, so they're a lot of work to port (even shrinks like 90nm -> 65nm are a lot of work).
To give a wishy-washy explanation, consider building an engine. You could come up with a very conservative design that works fine with either mostly aluminum parts or 100% steel parts, but it wouldn't be an optimal design for either material. On the other hand, you could optimize the hell out of a design intended only for steel parts and eek out every last horsepower / mile per gallon. Of course, if for some reason you want to switch to a different metal, it's going to be a lot of work. If anyone wants a more technical explanation, start a new thread asking why it's hard to port designs between processes (and send me a pm so I see it
Also, does anyone know how many CPUs AMD is allowed to outsource?
Originally posted by: SickBeast
Isn't the 55nm process pretty close to the 65nm one? Would that not make the shink easier than either 90nm to 65nm, or 65nm to 45nm?Originally posted by: CTho9305
Not really (not quickly). Each manufacturing process is slightly different (sometimes very different; AMD using SOI and TSMC using bulk is pretty significant). If you make a non-aggressive design, it's easy to port it between the processes; if you're more aggressive, it becomes harder to port the design. CPU designs are usually extremely aggressive, so they're a lot of work to port (even shrinks like 90nm -> 65nm are a lot of work).
To give a wishy-washy explanation, consider building an engine. You could come up with a very conservative design that works fine with either mostly aluminum parts or 100% steel parts, but it wouldn't be an optimal design for either material. On the other hand, you could optimize the hell out of a design intended only for steel parts and eek out every last horsepower / mile per gallon. Of course, if for some reason you want to switch to a different metal, it's going to be a lot of work. If anyone wants a more technical explanation, start a new thread asking why it's hard to port designs between processes (and send me a pm so I see it
It's still a different process - one of TSMC's bulk processes, vs. AMD's SOI process. The SOI->bulk conversion alone would be a big deal, let alone the other differences. Going from a TSMC 65nm process to a TSMC 55nm process would likely be pretty easy (I think TSMC's half nodes are supposed to be "almost" optical shrinks, whatever that means)...but that's not what would have to happen. Feel free to start a thread asking about SOI vs bulk differences.
TSMC's 55nm (from what I've read) is indeed a linear optical shrink from 65nm...however (as CTho mentioned), it is on bulk silicon not SOI, so it won't work for the CPUs.
As to outsourcing, I know it used to be 20%...but I can't find the clause in the newer contract (from Jan 01) which superceded the older one. Besides, it's highly doubtful Intel would have enforced it anyway...if they had used the remedy of pulling the license agreement, then they would have to stop making chips as well (all of Intel's chips use AMD patents to a very large degree, and vice versa).
Actually, that 32nm will use both bulk and SOI (the current test SRAM is SOI).
AMD dropped in server sales only this last quarter (the other quarters they gained).
The segment they lost was only the low end (which is also the highest volume), and I can't see that segment needing 504GB of memory...
heyheybooboo -
All new nodes are first run on SRAMs...be they Intel, IBM, or AMD.
I've bought AMD for years and don't care for overpriced intel offerings. I sure hope the company stays solvent, even if some internet whacko overclockers complain that the Phenom is 3.2% slower. All I care about is shuttle getting off their butts and supporting phenom in their XPC bios. So far all I've seen is BE series compatibility additions, nothing yet on the 6400+.
Anybody know if an SK22G2 will take a 6400+?
Anybody know if an SK22G2 will take a 6400+?
myocardia
Diamond Member
- Jun 21, 2003
- 9,291
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I know of a great place for you to join. It's called forums.amd.com. Oh wait, the people who post there are also pissed off about how horribly the Phenom performs, and even moreso about the Phenom/Barcelona's TLB bug.
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